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Searched refs:IA32_MSR_MC_CTL2 (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/i86pc/cpu/generic_cpu/
H A Dgcpu_poll_ntv.c103 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC_CTL2(i), in gcpu_ntv_mca_poll()
106 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), in gcpu_ntv_mca_poll()
H A Dgcpu_mca.c1232 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC_CTL2(i), &ctl2); in gcpu_mca_init()
1236 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), ctl2); in gcpu_mca_init()
1237 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC_CTL2(i), &ctl2); in gcpu_mca_init()
1247 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(i), ctl2); in gcpu_mca_init()
1540 IA32_MSR_MC_CTL2(bank), &ctl2); in gcpu_cmci_logout()
1543 IA32_MSR_MC_CTL2(bank), ctl2); in gcpu_cmci_logout()
1580 (void) cmi_hdl_rdmsr(hdl, IA32_MSR_MC_CTL2(bank), in gcpu_cmci_throttle()
1583 (void) cmi_hdl_wrmsr(hdl, IA32_MSR_MC_CTL2(bank), in gcpu_cmci_throttle()
/titanic_41/usr/src/uts/intel/sys/
H A Dmca_x86.h97 #define IA32_MSR_MC_CTL2(i) (_IA32_MSR_MC0_CTL2 + (i)) macro