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Searched refs:HXGE_REG_RD32 (Results 1 – 7 of 7) sorted by relevance

/titanic_41/usr/src/uts/common/io/hxge/
H A Dhpi_vir.c109 HXGE_REG_RD32(handle, offset, ldf_p); in hpi_ldsv_get()
165 HXGE_REG_RD32(handle, LD_INTR_MGMT + LDSV_OFFSET(ldg), in hpi_intr_ldg_mgmt_set()
259 HXGE_REG_RD32(handle, DEV_ERR_STAT, &statp->value); in hpi_fzc_sys_err_stat_get()
H A Dhxge_common_impl.h189 #define HXGE_REG_RD32(handle, offset, val_p) { \ macro
213 #define HXGE_REG_RD32(handle, offset, val_p) { \ macro
H A Dhpi_rxdma.h116 HXGE_REG_RD32(handle, (HXGE_RXDMA_OFFSET(reg, handle.is_vraddr,\
H A Dhpi_pfc.c925 HXGE_REG_RD32(handle, HCR_REG + HCR_N_MAC_ADDRS, n_of_addrs); in hpi_pfc_get_number_mac_addrs()
942 HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_LO + slot * step, &addr_lo); in hpi_pfc_mac_addr_get_i()
943 HXGE_REG_RD32(handle, HCR_REG + HCR_ADDR_HI + slot * step, &addr_hi); in hpi_pfc_mac_addr_get_i()
H A Dhxge_main.c4424 HXGE_REG_RD32(handle, CIP_LINK_STAT, &link_stat.value); in hxge_link_poll()
4487 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16, &msix_entry0); in hxge_msix_init()
4488 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 4, &msix_entry1); in hxge_msix_init()
4489 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 8, &msix_entry2); in hxge_msix_init()
4490 HXGE_REG_RD32(hxgep->hpi_msi_handle, i * 16 + 12, &msix_entry3); in hxge_msix_init()
H A Dhxge_hw.c234 HXGE_REG_RD32(handle, PEU_INTR_STAT, &stat.value); in hxge_peu_handle_sys_errors()
H A Dhxge_pfc.c154 HXGE_REG_RD32(hxgep->hpi_reg_handle, PHY_DEBUG_TRAINING_VEC, in hxge_get_blade_id()