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Searched refs:HV_INTR_VALID (Results 1 – 4 of 4) sorted by relevance

/titanic_41/usr/src/uts/sun4v/io/niumx/
H A Dniumx.c236 if (ih_p->ih_state == HV_INTR_VALID) in niumx_intr_dist()
237 (void) hvio_intr_setvalid(sysino, HV_INTR_VALID); in niumx_intr_dist()
851 ret = niumx_set_intr(dip, rdip, hdlp, HV_INTR_VALID); in niumx_intr_ops()
933 if (valid == HV_INTR_VALID) in niumx_set_intr()
1022 if (ih_p->ih_state == HV_INTR_VALID) in niumx_set_intr_target()
1023 (void) hvio_intr_setvalid(sysino, HV_INTR_VALID); in niumx_set_intr_target()
/titanic_41/usr/src/uts/sun4v/io/
H A Dcnex.c375 if (intr_state == HV_INTR_VALID) { in cnex_intr_new_cpu()
389 if (intr_state == HV_INTR_VALID) { in cnex_intr_new_cpu()
391 HV_INTR_VALID); in cnex_intr_new_cpu()
720 rv = hvldc_intr_setvalid(cnex_ssp->cfghdl, iinfo->ino, HV_INTR_VALID); in cnex_add_intr()
H A Dvnex.c257 (void) hvio_intr_setvalid(vid_p->vid_ihdl, HV_INTR_VALID); in vnex_intr_dist()
423 if ((hvio_intr_setvalid(vid_p->vid_ihdl, HV_INTR_VALID)) != H_EOK) { in vnex_enable_intr()
/titanic_41/usr/src/uts/sun4v/sys/
H A Dhypervisor_api.h220 #define HV_INTR_VALID 1 macro