Searched refs:FZC_DMC (Results 1 – 5 of 5) sorted by relevance
50 #define FZC_DMC 0x680000 macro115 #define RED_RAN_INIT (FZC_DMC + 0x00068)117 #define RX_ADDR_MD (FZC_DMC + 0x00070)120 #define EING_TIMEOUT (FZC_DMC + 0x00078)123 #define RDC_TBL (FZC_DMC + 0x10000) /* 256 * 8 */127 #define TX_LOG_PAGE_VLD (FZC_DMC + 0x40000)128 #define TX_LOG_MASK1 (FZC_DMC + 0x40008)129 #define TX_LOG_VAL1 (FZC_DMC + 0x40010)130 #define TX_LOG_MASK2 (FZC_DMC + 0x40018)131 #define TX_LOG_VAL2 (FZC_DMC + 0x40020)[all …]
40 #define RX_DMA_CK_DIV_REG (FZC_DMC + 0x00000)69 #define DEF_PT_RDC_REG(port) (FZC_DMC + 0x00008 * (port + 1))70 #define DEF_PT0_RDC_REG (FZC_DMC + 0x00008)71 #define DEF_PT1_RDC_REG (FZC_DMC + 0x00010)72 #define DEF_PT2_RDC_REG (FZC_DMC + 0x00018)73 #define DEF_PT3_RDC_REG (FZC_DMC + 0x00020)128 #define RX_ADDR_MD_REG (FZC_DMC + 0x00070)162 #define PT_DRR_WT_REG(portnm) ((FZC_DMC + 0x00028) + (portnm * 8))163 #define PT_DRR_WT0_REG (FZC_DMC + 0x00028)164 #define PT_DRR_WT1_REG (FZC_DMC + 0x00030)[all …]
57 #define TX_LOG_PAGE_VLD_REG (FZC_DMC + 0x40000)58 #define TX_LOG_PAGE_MASK1_REG (FZC_DMC + 0x40008)59 #define TX_LOG_PAGE_VAL1_REG (FZC_DMC + 0x40010)60 #define TX_LOG_PAGE_MASK2_REG (FZC_DMC + 0x40018)61 #define TX_LOG_PAGE_VAL2_REG (FZC_DMC + 0x40020)62 #define TX_LOG_PAGE_RELO1_REG (FZC_DMC + 0x40028)63 #define TX_LOG_PAGE_RELO2_REG (FZC_DMC + 0x40030)64 #define TX_LOG_PAGE_HDL_REG (FZC_DMC + 0x40038)67 #define TX_ADDR_MD_REG (FZC_DMC + 0x45000)737 #define TX_DMA_MAP_REG (FZC_DMC + 0x50000)[all …]
110 #define ZCP_PAGE_HDL_REG (FZC_DMC + 0x20038)
2291 {"FZC_DMC", FZC_DMC},