xref: /titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/mcp/mac_drv_info.h (revision f391a51a4e9639750045473dba1cc2831267c93e)
1 #ifndef MAX_DRV_INFO_H
2 #define MAX_DRV_INFO_H
3 
4 #define PORT_0              0
5 #define PORT_1              1
6 #define PORT_MAX            2
7 #define NVM_PATH_MAX        2
8 
9 /* FCoE capabilities required from the driver */
10 struct fcoe_capabilities {
11 	u32 capability1;
12 	/* Maximum number of I/Os per connection */
13 	#define FCOE_IOS_PER_CONNECTION_MASK    0x0000ffff
14 	#define FCOE_IOS_PER_CONNECTION_SHIFT   0
15 	/* Maximum number of Logins per port */
16 	#define FCOE_LOGINS_PER_PORT_MASK       0xffff0000
17 	#define FCOE_LOGINS_PER_PORT_SHIFT   16
18 
19 	u32 capability2;
20 	/* Maximum number of exchanges */
21 	#define FCOE_NUMBER_OF_EXCHANGES_MASK   0x0000ffff
22 	#define FCOE_NUMBER_OF_EXCHANGES_SHIFT  0
23 	/* Maximum NPIV WWN per port */
24 	#define FCOE_NPIV_WWN_PER_PORT_MASK     0xffff0000
25 	#define FCOE_NPIV_WWN_PER_PORT_SHIFT    16
26 
27 	u32 capability3;
28 	/* Maximum number of targets supported */
29 	#define FCOE_TARGETS_SUPPORTED_MASK     0x0000ffff
30 	#define FCOE_TARGETS_SUPPORTED_SHIFT    0
31 	/* Maximum number of outstanding commands across all connections */
32 	#define FCOE_OUTSTANDING_COMMANDS_MASK  0xffff0000
33 	#define FCOE_OUTSTANDING_COMMANDS_SHIFT 16
34 
35 	u32 capability4;
36 	#define FCOE_CAPABILITY4_STATEFUL       		0x00000001
37 	#define FCOE_CAPABILITY4_STATELESS      		0x00000002
38 	#define FCOE_CAPABILITY4_CAPABILITIES_REPORTED_VALID   	0x00000004
39 };
40 
41 struct glob_ncsi_oem_data
42 {
43 	u32 driver_version;
44 	u32 unused[3];
45 	struct fcoe_capabilities fcoe_features[NVM_PATH_MAX][PORT_MAX];
46 };
47 
48 /* current drv_info version */
49 #define DRV_INFO_CUR_VER 2
50 
51 /* drv_info op codes supported */
52 enum drv_info_opcode {
53 	ETH_STATS_OPCODE,
54 	FCOE_STATS_OPCODE,
55 	ISCSI_STATS_OPCODE
56 };
57 
58 #define ETH_STAT_INFO_VERSION_LEN	12
59 /*  Per PCI Function Ethernet Statistics required from the driver */
60 struct eth_stats_info {
61 	/* Function's Driver Version. padded to 12 */
62 	u8 version[ETH_STAT_INFO_VERSION_LEN];
63 	/* Locally Admin Addr. BigEndian EIU48. Actual size is 6 bytes */
64 	u8 mac_local[8];
65 	u8 mac_add1[8];		/* Additional Programmed MAC Addr 1. */
66 	u8 mac_add2[8];		/* Additional Programmed MAC Addr 2. */
67 	u32 mtu_size;		/* MTU Size. Note   : Negotiated MTU */
68 	u32 feature_flags;	/* Feature_Flags. */
69 #define FEATURE_ETH_CHKSUM_OFFLOAD_MASK		0x01
70 #define FEATURE_ETH_LSO_MASK			0x02
71 #define FEATURE_ETH_BOOTMODE_MASK		0x1C
72 #define FEATURE_ETH_BOOTMODE_SHIFT		2
73 #define FEATURE_ETH_BOOTMODE_NONE		(0x0 << 2)
74 #define FEATURE_ETH_BOOTMODE_PXE		(0x1 << 2)
75 #define FEATURE_ETH_BOOTMODE_ISCSI		(0x2 << 2)
76 #define FEATURE_ETH_BOOTMODE_FCOE		(0x3 << 2)
77 #define FEATURE_ETH_TOE_MASK			0x20
78 	u32 lso_max_size;	/* LSO MaxOffloadSize. */
79 	u32 lso_min_seg_cnt;	/* LSO MinSegmentCount. */
80 	/* Num Offloaded Connections TCP_IPv4. */
81 	u32 ipv4_ofld_cnt;
82 	/* Num Offloaded Connections TCP_IPv6. */
83 	u32 ipv6_ofld_cnt;
84 	u32 promiscuous_mode;	/* Promiscuous Mode. non-zero true */
85 	u32 txq_size;		/* TX Descriptors Queue Size */
86 	u32 rxq_size;		/* RX Descriptors Queue Size */
87 	/* TX Descriptor Queue Avg Depth. % Avg Queue Depth since last poll */
88 	u32 txq_avg_depth;
89 	/* RX Descriptors Queue Avg Depth. % Avg Queue Depth since last poll */
90 	u32 rxq_avg_depth;
91 	/* IOV_Offload. 0=none; 1=MultiQueue, 2=VEB 3= VEPA*/
92 	u32 iov_offload;
93 	/* Number of NetQueue/VMQ Config'd. */
94 	u32 netq_cnt;
95 	u32 vf_cnt;		/* Num VF assigned to this PF. */
96 };
97 
98 /*  Per PCI Function FCOE Statistics required from the driver */
99 struct fcoe_stats_info {
100 	u8 version[12];		/* Function's Driver Version. */
101 	u8 mac_local[8];	/* Locally Admin Addr. */
102 	u8 mac_add1[8];		/* Additional Programmed MAC Addr 1. */
103 	u8 mac_add2[8];		/* Additional Programmed MAC Addr 2. */
104 	/* QoS Priority (per 802.1p). 0-7255 */
105 	u32 qos_priority;
106 	u32 txq_size;		/* FCoE TX Descriptors Queue Size. */
107 	u32 rxq_size;		/* FCoE RX Descriptors Queue Size. */
108 	/* FCoE TX Descriptor Queue Avg Depth. */
109 	u32 txq_avg_depth;
110 	/* FCoE RX Descriptors Queue Avg Depth. */
111 	u32 rxq_avg_depth;
112 	u32 rx_frames_lo;	/* FCoE RX Frames received. */
113 	u32 rx_frames_hi;	/* FCoE RX Frames received. */
114 	u32 rx_bytes_lo;	/* FCoE RX Bytes received. */
115 	u32 rx_bytes_hi;	/* FCoE RX Bytes received. */
116 	u32 tx_frames_lo;	/* FCoE TX Frames sent. */
117 	u32 tx_frames_hi;	/* FCoE TX Frames sent. */
118 	u32 tx_bytes_lo;	/* FCoE TX Bytes sent. */
119 	u32 tx_bytes_hi;	/* FCoE TX Bytes sent. */
120 	u32 rx_fcs_errors;	/* number of receive packets with FCS errors */
121 	u32 rx_fc_crc_errors;	/* number of FC frames with CRC errors*/
122 	u32 fip_login_failures;	/* number of FCoE/FIP Login failures */
123 };
124 
125 /* Per PCI  Function iSCSI Statistics required from the driver*/
126 struct iscsi_stats_info {
127 	u8 version[12];		/* Function's Driver Version. */
128 	u8 mac_local[8];	/* Locally Admin iSCSI MAC Addr. */
129 	u8 mac_add1[8];		/* Additional Programmed MAC Addr 1. */
130 	/* QoS Priority (per 802.1p). 0-7255 */
131 	u32 qos_priority;
132 
133 	u8 initiator_name[64];	/* iSCSI Boot Initiator Node name. */
134 
135 	u8 ww_port_name[64];	/* iSCSI World wide port name */
136 
137 	u8 boot_target_name[64];/* iSCSI Boot Target Name. */
138 
139 	u8 boot_target_ip[16];	/* iSCSI Boot Target IP. */
140 	u32 boot_target_portal;	/* iSCSI Boot Target Portal. */
141 	u8 boot_init_ip[16];	/* iSCSI Boot Initiator IP Address. */
142 	u32 max_frame_size;	/* Max Frame Size. bytes */
143 	u32 txq_size;		/* PDU TX Descriptors Queue Size. */
144 	u32 rxq_size;		/* PDU RX Descriptors Queue Size. */
145 
146 	u32 txq_avg_depth;	/*PDU TX Descriptor Queue Avg Depth. */
147 	u32 rxq_avg_depth;	/*PDU RX Descriptors Queue Avg Depth. */
148 	u32 rx_pdus_lo;		/* iSCSI PDUs received. */
149 	u32 rx_pdus_hi;		/* iSCSI PDUs received. */
150 
151 	u32 rx_bytes_lo;	/* iSCSI RX Bytes received. */
152 	u32 rx_bytes_hi;	/* iSCSI RX Bytes received. */
153 	u32 tx_pdus_lo;		/* iSCSI PDUs sent. */
154 	u32 tx_pdus_hi;		/* iSCSI PDUs sent. */
155 
156 	u32 tx_bytes_lo;	/* iSCSI PDU TX Bytes sent. */
157 	u32 tx_bytes_hi;	/* iSCSI PDU TX Bytes sent. */
158 	u32 pcp_prior_map_tbl;	/*C-PCP to S-PCP Priority MapTable.
159 				9 nibbles, the position of each nibble
160 				represents the C-PCP value, the value
161 				of the nibble = S-PCP value.*/
162 };
163 
164 union drv_info_to_mcp {
165 	struct eth_stats_info		ether_stat;
166 	struct fcoe_stats_info		fcoe_stat;
167 	struct iscsi_stats_info		iscsi_stat;
168 };
169 
170 #endif /* MAX_DRV_INFO_H*/
171