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Searched refs:ESR_0_PLL_CONFIG_REG (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/sys/nxge/
H A Dnxge_mac_hw.h793 #define ESR_0_PLL_CONFIG_REG 0x010 macro
/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_mac.c2085 ESR_REG_WR(handle, ESR_0_PLL_CONFIG_REG, in nxge_neptune_10G_serdes_init()
2338 ESR_REG_WR(handle, ESR_0_PLL_CONFIG_REG, in nxge_1G_serdes_init()