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Searched refs:ERR1_THR_RD (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/intel_nb5000/
H A Dnb5000_init.c1408 err1_thr = ERR1_THR_RD(0); in nb_thr_init()
H A Dnb5000.h1404 #define ERR1_THR_RD(ip) nb_pci_getw(0, 16, 2, 0xfa, ip) macro