Searched refs:EHC_DEV0 (Results 1 – 3 of 3) sorted by relevance
| /titanic_41/usr/src/uts/sun4u/javelin/io/ |
| H A D | envctrltwo.c | 1199 ENVCTRL_UE250_PCF8574A_BASE_ADDR | EHC_DEV0, in envctrl_dev_isr()
1208 ENVCTRL_UE250_PCF8574A_BASE_ADDR | EHC_DEV0, in envctrl_dev_isr()
1855 ENVCTRL_UE250_PCF8574A_BASE_ADDR | EHC_DEV0, in envctrl_fan_fail_service()
1863 ENVCTRL_UE250_PCF8574A_BASE_ADDR | EHC_DEV0, in envctrl_fan_fail_service()
2013 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_reset_dflop()
2021 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_reset_dflop()
2039 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_enable_devintrs()
2047 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_enable_devintrs()
2064 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_intr_latch_clr()
2072 status = envctrl_write_chip(unitp, ENVCTRL_PCF8574A, EHC_DEV0, in envctrl_intr_latch_clr()
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| /titanic_41/usr/src/uts/sun4u/io/ |
| H A D | envctrl_targets.c | 78 #define EHC_DEV0 0x00 macro
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| /titanic_41/usr/src/uts/sun4u/tazmo/io/ |
| H A D | envctrl.c | 271 #define EHC_DEV0 0x00 macro
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