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Searched refs:DR_TRAP0 (Results 1 – 1 of 1) sorted by relevance

/titanic_41/usr/src/uts/intel/sys/
H A Ddebugreg.h55 #define DR_TRAP0 0x1 /* Trap from debug register #0 */ macro
83 #define DR_TRAPS (DR_TRAP0|DR_TRAP1|DR_TRAP2|DR_TRAP3)