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Searched refs:DEBUG1 (Results 1 – 25 of 28) sorted by relevance

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/titanic_41/usr/src/uts/sun/io/dada/conf/
H A Ddcd_confsubr.c115 #ifdef DEBUG1 in dcd_hba_probe()
163 #ifdef DEBUG1 in dcd_hba_probe()
180 #ifdef DEBUG1 in dcd_hba_probe()
246 #ifdef DEBUG1 in dcd_test()
263 #ifdef DEBUG1 in dcd_test()
291 #ifdef DEBUG1 in makecommand()
/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dpcix.c62 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: pcix_cap_ptr = %x\n", in pcix_set_cmd_reg()
72 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: PCI-X CMD Register " in pcix_set_cmd_reg()
78 DEBUG1(DBG_INIT_CLD, child, "pcix_set_cmd_reg: PCI-X CMD Register " in pcix_set_cmd_reg()
H A Dpci_pwr.c287 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: " in pci_pwr_new_lvl()
298 DEBUG1(DBG_PWR, pwr_p->pwr_dip, "new_lvl: unknown " in pci_pwr_new_lvl()
310 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
315 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
320 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
325 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
364 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_new_lvl()
464 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_ops()
504 DEBUG1(DBG_PWR, pwr_p->pwr_dip, in pci_pwr_ops()
H A Dpci_iommu.c125 DEBUG1(DBG_ATTACH, dip, "iommu_create: allocated size=%x\n", in iommu_create()
302 DEBUG1(DBG_MAP_WIN, dip, "iommu_map_pages: redzone pg=%x\n", in iommu_map_pages()
350 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, 0, " %x", dvma_pg); in iommu_unmap_pages()
395 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, dip, " %x", pg_index); in iommu_unmap_window()
398 DEBUG1(DBG_UNMAP_WIN|DBG_CONT, dip, " (context %x)", ctx); in iommu_unmap_window()
H A Dpcipsy.c535 DEBUG1(DBG_IB, dip, "pci_xlate_intr: done ino=%x\n", intr); in pci_xlate_intr()
765 DEBUG1(DBG_R_INTX, dip, "remove xintr %x\n", ino); in cb_remove_xintr()
897 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s); in pbm_configure()
899 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg==%x\n", in pbm_configure()
903 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg==%llx\n", l); in pbm_configure()
919 DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n", in pbm_configure()
988 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l); in pbm_configure()
996 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg==%llx\n", l); in pbm_configure()
1009 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l); in pbm_configure()
1017 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg=%x\n", s); in pbm_configure()
[all …]
H A Dpci_intr.c472 DEBUG1(DBG_A_INTX, dip, "ino %x is invalid\n", ino); in pci_add_intr()
522 DEBUG1(DBG_A_INTX, dip, "dup intr #%d\n", in pci_add_intr()
656 DEBUG1(DBG_R_INTX, dip, in pci_remove_intr()
679 DEBUG1(DBG_R_INTX, dip, "can't get mondo for ino %x\n", ino); in pci_remove_intr()
717 DEBUG1(DBG_R_INTX, dip, "success! mondo=%x\n", mondo); in pci_remove_intr()
H A Dpci_ib.c105 DEBUG1(DBG_ATTACH, dip, "ib_create: numproxy=%x\n", in ib_create()
908 DEBUG1(DBG_IB, dip, "ib_get_intr_target: ino %x\n", ino); in ib_get_intr_target()
915 DEBUG1(DBG_IB, dip, "ib_get_intr_target: cpu_id %x\n", *cpu_id_p); in ib_get_intr_target()
947 DEBUG1(DBG_IB, dip, "ib_set_intr_target: orig mapreg value: 0x%llx\n", in ib_set_intr_target()
979 DEBUG1(DBG_IB, dip, in ib_set_intr_target()
992 DEBUG1(DBG_IB, dip, "Writing new mapreg value:0x%llx\n", in ib_set_intr_target()
H A Dpcisch.c723 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l); in pbm_configure()
739 DEBUG1(DBG_ATTACH, dip, "pbm_configure: %d mhz\n", in pbm_configure()
850 DEBUG1(DBG_ATTACH, dip, "pbm_configure: ctrl reg=%llx\n", l); in pbm_configure()
895 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l); in pbm_configure()
921 DEBUG1(DBG_ATTACH, dip, "pbm_configure: PCI diag reg=%llx\n", l); in pbm_configure()
930 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf command reg=%x\n", s); in pbm_configure()
939 DEBUG1(DBG_ATTACH, dip, "pbm_configure: conf status reg=%x\n", s); in pbm_configure()
950 DEBUG1(DBG_ATTACH, dip, in pbm_configure()
972 DEBUG1(DBG_ATTACH, dip, "pbm_configure: Setting XMITS" in pbm_configure()
1054 DEBUG1(DBG_DMA_MAP, iommu_p->iommu_pci_p->pci_dip, in pci_iommu_free_dvma_context()
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H A Dsimba.c72 #define DEBUG1(f, s, a) if ((f)& simba_debug_flags) \ macro
93 #define DEBUG1(f, s, a) macro
383 DEBUG1(D_ATTACH, "attach(%p) ATTACH\n", devi); in simba_attach()
643 DEBUG1(D_CTLOPS, "simba_ctlops(): *result=%lx\n", *(off_t *)result); in simba_ctlops()
706 DEBUG1(D_INIT_CLD, "simba_initchild(): child=%p\n", child); in simba_initchild()
H A Dpci_dma.c77 DEBUG1(DBG_SC|DBG_CONT, dip, " %x", dvma_addr); in pci_sc_pg_inv()
666 DEBUG1(DBG_DMA_MAP|DBG_CONT, dip, "%x ", pfn); in pci_dma_pgpfn()
674 DEBUG1(DBG_DMA_MAP, dip, "pp=%p pfns=", pp); in pci_dma_pgpfn()
679 DEBUG1(DBG_DMA_MAP|DBG_CONT, dip, "%x ", pfn); in pci_dma_pgpfn()
946 DEBUG1(DBG_DMA_MAP, dip, "fast: ctx=0x%x\n", ctx); in pci_dvma_map_fast()
1257 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "pg0 adjust %lx\n", pg_offset); in pci_dma_adjust()
1266 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "last pg adjust %lx\n", pg_offset); in pci_dma_adjust()
1269 DEBUG1(DBG_BYPASS, mp->dmai_rdip, "win off %p\n", win_offset); in pci_dma_adjust()
H A Dpci_sc.c173 DEBUG1(DBG_ATTACH, dip, in sc_configure()
H A Dpci_tools.c757 DEBUG1(DBG_TOOLS, dip, "bar returned is 0x%llx\n", *bar); in pcitool_get_bar()
827 DEBUG1(DBG_TOOLS, dip, "config access: data:0x%llx\n", prg->data); in pcitool_config_request()
919 DEBUG1(DBG_TOOLS, dip, in pcitool_dev_reg_ops()
H A Dpci_util.c115 DEBUG1(DBG_ATTACH, dip, "get_pci_properties: numproxy=%d\n", in get_pci_properties()
121 DEBUG1(DBG_ATTACH, dip, "get_pci_properties: thermal_interrupt=%d\n", in get_pci_properties()
H A Dpci_pci.c471 DEBUG1(DBG_ATTACH, devi, in ppb_attach()
984 DEBUG1(DBG_INIT_CLD, child, "Turning on XMITS NCPQ " in ppb_initchild()
1294 DEBUG1(DBG_PWR, dip, "ppb_pwr(): ENTER level = %d\n", lvl); in ppb_pwr()
1433 DEBUG1(DBG_PWR, dip, "ppb_set_pwr: set PM state to %s\n\n", str); in ppb_pwr()
H A Dpci.c503 DEBUG1(DBG_MAP | DBG_CONT, dip, " r#=%x", r_no); in pci_map()
656 DEBUG1(DBG_DMA_ALLOCH, dip, "mp=%p\n", mp); in pci_dma_allochdl()
828 DEBUG1(DBG_DMA_WIN, dip, "%x out of range\n", win); in pci_dma_win()
H A Dpci_pbm.c115 DEBUG1(DBG_ATTACH, dip, "pbm_create: conf=%x\n", in pbm_create()
/titanic_41/usr/src/cmd/rmt/
H A Drmt.c124 #define DEBUG1(f, a) if (debug) (void) fprintf(debug, (f), (a)) macro
286 DEBUG1("rmtd: %c\n", key); in main()
302 DEBUG1("rmtd: s%c\n", key); in main()
361 DEBUG1("rmtd: W %s\n", count); in main()
368 DEBUG1(gettext("%s: premature eof\n"), in main()
386 DEBUG1("rmtd: R %s\n", count); in main()
421 DEBUG1("rmtd: C %s\n", device); in main()
475 DEBUG1("rmtd: A %lld\n", rval); in respond()
/titanic_41/usr/src/uts/sun4/io/
H A Dpcicfg.c235 #define DEBUG1(fmt, a1)\ macro
247 #define DEBUG1(fmt, a1) macro
679 DEBUG1("device port_type = %x\n", port_type); in pcicfg_pcie_device_type()
841 DEBUG1("Next Function - %x\n", func); in pcicfg_configure()
956 DEBUG1("ntbridge bus range start ->[%d]\n", next_bus); in pcicfg_configure_ntbridge()
1063 DEBUG1("ntbridge: finish probing 2nd bus, rc=%d\n", rc); in pcicfg_configure_ntbridge()
1118 DEBUG1("pcicfg: now unloading the ntbridge driver. rc1=%d\n", rc1); in pcicfg_configure_ntbridge()
1241 DEBUG1("Configuring children for %llx\n", dip); in pcicfg_ntbridge_configure_done()
1389 DEBUG1("cannot destroy ntbridge memory map size=%x\n", in pcicfg_ntbridge_unconfigure()
1395 DEBUG1("cannot destroy ntbridge io map size=%x\n", in pcicfg_ntbridge_unconfigure()
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/titanic_41/usr/src/uts/common/io/hotplug/hpcsvc/
H A Dhpcsvc.c51 #define DEBUG1(fmt, a1) \ macro
59 #define DEBUG1(fmt, a1) macro
454 DEBUG1("hpc_slot_register: %s", bus); in hpc_slot_register()
471 DEBUG1("hpc_slot_register: %s not in bus list", bus); in hpc_slot_register()
597 DEBUG1("hpc_slot_unregister: callback returned %x", r); in hpc_slot_unregister()
607 DEBUG1("hpc_slot_unregister: freeing slot, bus_slot_list=%x", in hpc_slot_unregister()
696 DEBUG1("hpc_remove_event_handler: handle=%x", handle); in hpc_remove_event_handler()
852 DEBUG1("hpc_slot_event_dispatcher: busp=%x", busp); in hpc_slot_event_dispatcher()
/titanic_41/usr/src/uts/sun4u/sys/pci/
H A Dpci_debug.h95 #define DEBUG1(flag, dip, fmt, a1) \ macro
115 #define DEBUG1(flag, dip, fmt, a1) macro
/titanic_41/usr/src/uts/intel/io/hotplug/pcicfg/
H A Dpcicfg.c194 #define DEBUG1(fmt, a1)\ macro
209 #define DEBUG1(fmt, a1) macro
710 DEBUG1("Next Function - %x\n", func); in pcicfg_configure()
834 DEBUG1("ntbridge bus range start ->[%d]\n", next_bus); in pcicfg_configure_ntbridge()
931 DEBUG1("ntbridge: finish probing 2nd bus, rc=%d\n", rc); in pcicfg_configure_ntbridge()
980 DEBUG1("pcicfg: now unloading the ntbridge driver. rc1=%d\n", rc1); in pcicfg_configure_ntbridge()
1113 DEBUG1("Configuring children for %p\n", dip); in pcicfg_ntbridge_configure_done()
1385 DEBUG1("ntbridge child: no \"%s\" property\n", in pcicfg_ntbridge_child()
1406 DEBUG1("Failed to get assigned-addresses property %llx\n", dip); in pcicfg_get_ntbridge_child_range()
1409 DEBUG1("pcicfg: ntbridge child range: dip = %s\n", in pcicfg_get_ntbridge_child_range()
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/titanic_41/usr/src/uts/sun4u/montecarlo/io/
H A Dhsc.c246 DEBUG1("hsc_connect: slot %d connection failed", in hsc_connect()
274 DEBUG1("hsc_connect: slot %d connected", in hsc_connect()
304 DEBUG1("hsc_disconnect: slot %d", hsp->hs_slot_number); in hsc_disconnect()
470 DEBUG1("hsc_get_slot_state: slot %d", hsp->hs_slot_number); in hsc_get_slot_state()
521 DEBUG1("hsc_set_config_state: slot %d", hsp->hs_slot_number); in hsc_set_config_state()
655 DEBUG1("hsc_autoconfig: slot %d", hsp->hs_slot_number); in hsc_autoconfig()
714 DEBUG1("hsc_slot_enable: slot %d", hsp->hs_slot_number); in hsc_slot_enable()
814 DEBUG1("hsc_disable_slot: slot %d", hsp->hs_slot_number); in scsb_hsc_disable_slot()
835 DEBUG1("hsc_disable_slot: slot %d", hsp->hs_slot_number); in scsb_hsc_enable_slot()
997 DEBUG1("hsc_slot_unregister: slot number %d", slot_number); in hsc_slot_unregister()
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/titanic_41/usr/src/uts/sun/io/dada/impl/
H A Ddcd_hba.c193 #ifdef DEBUG1 in dcd_hba_attach()
389 #ifdef DEBUG1 in dcd_hba_pkt_alloc()
/titanic_41/usr/src/uts/sun4u/montecarlo/sys/
H A Dscsb.h686 #define DEBUG1(fmt, a1)\ macro
698 #define DEBUG1(fmt, a1) macro
/titanic_41/usr/src/uts/common/io/
H A Dldterm.c538 #define DEBUG1(a) if (ldterm_debug == 1) printf a macro
546 #define DEBUG1(a) macro
1188 DEBUG1(("M_STARTI down\n")); in ldtermrput()
1205 DEBUG1(("M_STARTI down\n")); in ldtermrput()
1457 DEBUG1(("M_STOPI down\n")); in ldtermrput()
3092 DEBUG1(("ldtermwmsg:M_READ RECEIVED\n")); in ldtermwput()

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