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Searched refs:DDI_DEFAULT_ACC (Results 1 – 25 of 46) sorted by relevance

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/titanic_41/usr/src/uts/i86pc/io/pciex/
H A Dnpe.c405 != DDI_DEFAULT_ACC) { in npe_setup_std_pcicfg_acc()
510 != DDI_DEFAULT_ACC) { in npe_bus_map()
549 DDI_DEFAULT_ACC) { in npe_bus_map()
691 DDI_DEFAULT_ACC) { in npe_bus_map()
/titanic_41/usr/src/uts/common/sys/
H A Ddditypes.h309 #define DDI_DEFAULT_ACC 0x01 /* take default action */ macro
/titanic_41/usr/src/uts/common/io/hxge/
H A Dhxge_fm.c222 reg_attr->devacc_attr_access = DDI_DEFAULT_ACC; in hxge_fm_init()
223 desc_attr->devacc_attr_access = DDI_DEFAULT_ACC; in hxge_fm_init()
/titanic_41/usr/src/uts/common/io/fibre-channel/fca/oce/
H A Doce_buf.c236 oce_dma_buf_accattr.devacc_attr_access = DDI_DEFAULT_ACC; in oce_set_dma_fma_flags()
H A Doce_hw.c387 reg_accattr.devacc_attr_access = DDI_DEFAULT_ACC; in oce_set_reg_fma_flags()
/titanic_41/usr/src/uts/intel/ia32/os/
H A Dddi_i86.c239 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init()
242 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init()
244 if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in impl_acc_err_init()
281 devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_hdl_init()
292 devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_hdl_init()
403 case DDI_DEFAULT_ACC: in impl_acc_hdl_init()
/titanic_41/usr/src/uts/common/io/rge/
H A Drge_main.c77 DDI_DEFAULT_ACC
87 DDI_DEFAULT_ACC
97 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/i86pc/io/ioat/
H A Dioat.c113 DDI_DEFAULT_ACC /* devacc_attr_access */
/titanic_41/usr/src/uts/common/io/ib/adapters/hermon/
H A Dhermon_fm.c491 DDI_DEFAULT_ACC in hermon_fm_ereport_init()
1170 return (DDI_DEFAULT_ACC); in hermon_devacc_attr_access()
/titanic_41/usr/src/uts/sun4/os/
H A Dddi_impl.c1387 handlep->ah_acc.devacc_attr_access = DDI_DEFAULT_ACC; in impl_acc_err_init()
1389 if (handlep->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in impl_acc_err_init()
/titanic_41/usr/src/uts/common/io/bnxe/
H A Dbnxe_mm.c71 DDI_DEFAULT_ACC /* devacc_attr_access */
79 DDI_DEFAULT_ACC /* devacc_attr_access */
/titanic_41/usr/src/uts/common/io/sdcard/adapters/sdhost/
H A Dsdhost.c190 DDI_DEFAULT_ACC, /* devacc_attr_access */
196 DDI_DEFAULT_ACC, /* devacc_attr_access */
/titanic_41/usr/src/uts/i86pc/os/
H A Dddi_impl.c2353 } else if (hdlp->ah_acc.devacc_attr_access == DDI_DEFAULT_ACC) { in pci_peekpoke_check_fma()
2373 if (hdlp->ah_acc.devacc_attr_access != DDI_DEFAULT_ACC && in pci_peekpoke_check_fma()
2422 if (hdlp->ah_acc.devacc_attr_access != DDI_DEFAULT_ACC && in pci_peekpoke_check_nofma()
/titanic_41/usr/src/uts/common/io/nge/
H A Dnge_main.c101 DDI_DEFAULT_ACC
111 DDI_DEFAULT_ACC
121 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/nxge/
H A Dnxge_fm.c401 reg_attr->devacc_attr_access = DDI_DEFAULT_ACC; in nxge_fm_init()
/titanic_41/usr/src/uts/common/io/mega_sas/
H A Dmegaraid_sas.c162 DDI_DEFAULT_ACC
3000 tmp_endian_attr.devacc_attr_access = DDI_DEFAULT_ACC; in mega_alloc_dma_obj()
4917 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC; in megasas_fm_init()
4946 endian_attr.devacc_attr_access = DDI_DEFAULT_ACC; in megasas_fm_fini()
/titanic_41/usr/src/uts/common/io/mwl/
H A Dmwl.c141 DDI_DEFAULT_ACC
148 DDI_DEFAULT_ACC
158 DDI_DEFAULT_ACC
165 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/vioblk/
H A Dvioblk.c225 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/rtw/
H A Drtw.c58 DDI_DEFAULT_ACC
68 DDI_DEFAULT_ACC
74 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/sun4u/io/pci/
H A Dpci.c546 DDI_DEFAULT_ACC) in pci_map()
/titanic_41/usr/src/uts/common/io/virtio/
H A Dvirtio.c294 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/arn/
H A Darn_main.c80 DDI_DEFAULT_ACC
90 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/scsi/adapters/pmcs/
H A Dpmcs_attach.c179 DDI_DEFAULT_ACC
3242 pwp->reg_acc_attr.devacc_attr_access = DDI_DEFAULT_ACC; in pmcs_fm_fini()
/titanic_41/usr/src/uts/common/io/iwp/
H A Diwp.c241 DDI_DEFAULT_ACC
251 DDI_DEFAULT_ACC
261 DDI_DEFAULT_ACC
/titanic_41/usr/src/uts/common/io/iwh/
H A Diwh.c253 DDI_DEFAULT_ACC
263 DDI_DEFAULT_ACC
273 DDI_DEFAULT_ACC

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