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Searched refs:DCSR_INT_EN (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/sun/sys/
H A Dfdreg.h291 #define DCSR_INT_EN 0x00000010 /* 1= enable floppy interrupts */ macro
303 #define DCSR_INIT_BITS DCSR_INT_EN | DCSR_EN_CNT | DCSR_CSR_DRAIN \
/titanic_41/usr/src/uts/common/sys/
H A Decppreg.h219 #define DCSR_INT_EN 0x00000010 /* 1= enable sidewinder/ebus intr */ macro
/titanic_41/usr/src/uts/common/io/
H A Decpp.c5654 &pp->uh.ebus.dmac->csr, ~DCSR_INT_EN); in cheerio_mask_intr()
5662 &pp->uh.ebus.dmac->csr, DCSR_INT_EN | DCSR_TCI_DIS); in cheerio_unmask_intr()
5673 SET_DMAC_CSR(pp, DCSR_INT_EN | DCSR_EN_CNT | DCSR_EN_DMA | in cheerio_dma_start()
5676 SET_DMAC_CSR(pp, DCSR_INT_EN | DCSR_EN_CNT | DCSR_EN_DMA | in cheerio_dma_start()
5693 ~(DCSR_EN_DMA | DCSR_EN_CNT| DCSR_INT_EN)); in cheerio_dma_stop()