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Searched refs:DCC_ADDRESSING_MODE_DUAL_CHANNEL_ASYMMETRIC (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/io/drm/
H A Di915_gem_tiling.c123 case DCC_ADDRESSING_MODE_DUAL_CHANNEL_ASYMMETRIC: in i915_gem_detect_bit_6_swizzle()
H A Di915_drv.h1032 #define DCC_ADDRESSING_MODE_DUAL_CHANNEL_ASYMMETRIC (1 << 0) macro