xref: /titanic_41/usr/src/uts/common/io/bnxe/577xx/hsi/hw/include/dbu_reg_Driver.h (revision f391a51a4e9639750045473dba1cc2831267c93e)
1  #define DBU_REG_DBU_CMD                             0x0	//ACCESS:??  DataWidth:0x20
2          #define DBU_CMD_ENABLE                             (1L<<0)
3          #define DBU_CMD_ENABLE_BITSHIFT                    0
4          #define DBU_CMD_RX_ERROR                           (1L<<1)
5          #define DBU_CMD_RX_ERROR_BITSHIFT                  1
6          #define DBU_CMD_RX_OVERFLOW                        (1L<<2)
7          #define DBU_CMD_RX_OVERFLOW_BITSHIFT               2
8  #define DBU_REG_DBU_STATUS                          0x4	//ACCESS:??  DataWidth:0x20
9          #define DBU_STATUS_RXDATA_VALID                    (1L<<0)
10          #define DBU_STATUS_RXDATA_VALID_BITSHIFT           0
11          #define DBU_STATUS_TXDATA_OCCUPIED                 (1L<<1)
12          #define DBU_STATUS_TXDATA_OCCUPIED_BITSHIFT        1
13  #define DBU_REG_DBU_CONFIG                          0x8	//ACCESS:??  DataWidth:0x20
14          #define DBU_CONFIG_TIMING_OVERRIDE                 (1L<<0)
15          #define DBU_CONFIG_TIMING_OVERRIDE_BITSHIFT        0
16          #define DBU_CONFIG_DEBUGSM_ENABLE                  (1L<<1)
17          #define DBU_CONFIG_DEBUGSM_ENABLE_BITSHIFT         1
18          #define DBU_CONFIG_CRLF_ENABLE                     (1L<<2)
19          #define DBU_CONFIG_CRLF_ENABLE_BITSHIFT            2
20  #define DBU_REG_DBU_TIMING                          0xc	//ACCESS:??  DataWidth:0x20
21          #define DBU_TIMING_FB_SMPL_OFFSET                  (0xffffL<<0)
22          #define DBU_TIMING_FB_SMPL_OFFSET_BITSHIFT         0
23          #define DBU_TIMING_BIT_INTERVAL                    (0xffffL<<16)
24          #define DBU_TIMING_BIT_INTERVAL_BITSHIFT           16
25  #define DBU_REG_DBU_RXDATA                          0x10	//ACCESS:??  DataWidth:0x20
26          #define DBU_RXDATA_VALUE                           (0xffL<<0)
27          #define DBU_RXDATA_VALUE_BITSHIFT                  0
28          #define DBU_RXDATA_ERROR                           (1L<<8)
29          #define DBU_RXDATA_ERROR_BITSHIFT                  8
30  #define DBU_REG_DBU_TXDATA                          0x14	//ACCESS:??  DataWidth:0x20
31          #define DBU_TXDATA_VALUE                           (0xffL<<0)
32          #define DBU_TXDATA_VALUE_BITSHIFT                  0
33  #define DBU_REG_DBU_VFID_CFG                        0x18	//ACCESS:??  DataWidth:0x20
34          #define DBU_VFID_CFG_VFID_VALUE                    (0x3fL<<0)
35          #define DBU_VFID_CFG_VFID_VALUE_BITSHIFT           0
36          #define DBU_VFID_CFG_VFID_VALID                    (1L<<16)
37          #define DBU_VFID_CFG_VFID_VALID_BITSHIFT           16
38          #define DBU_VFID_CFG_PATHID                        (1L<<20)
39          #define DBU_VFID_CFG_PATHID_BITSHIFT               20
40          #define DBU_VFID_CFG_PATH_FORCE                    (1L<<31)
41          #define DBU_VFID_CFG_PATH_FORCE_BITSHIFT           31
42              #define DBU_VFID_CFG_PATH_FORCE_0              (0L<<31)
43              #define DBU_VFID_CFG_PATH_FORCE_0_BITSHIFT     31
44              #define DBU_VFID_CFG_PATH_FORCE_1              (1L<<31)
45              #define DBU_VFID_CFG_PATH_FORCE_1_BITSHIFT     31
46  #define DBU_REG_DBU_UNUSED_A                        0x1c	//ACCESS:??  DataWidth:0x20
47  #define DBU_REG_DBU_UNUSED_A_COUNT                  249
48