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Searched refs:CPUSET_AND (Results 1 – 7 of 7) sorted by relevance

/titanic_41/usr/src/uts/sun4/os/
H A Dx_call.c327 CPUSET_AND(xc_cpuset, cpuset); in xt_some()
568 CPUSET_AND(xc_cpuset, cpuset); in xc_some()
597 CPUSET_AND(mset, cpuset); in xc_some()
676 CPUSET_AND(mset, xc_cpuset); in xc_all()
751 CPUSET_AND(xc_cpuset, cpuset); in xc_attention()
840 CPUSET_AND(xc_cpuset, cpuset); in xc_dismissed()
/titanic_41/usr/src/uts/common/sys/
H A Dcpuvar.h484 #define CPUSET_AND(set1, set2) { \ macro
512 #define CPUSET_AND(set1, set2) ((void)((set1) &= (set2))) macro
/titanic_41/usr/src/uts/sun4u/os/
H A Dmach_cpu_states.c532 CPUSET_AND(cpuset, cpu_ready_set); in xt_sync()
/titanic_41/usr/src/uts/sun4v/os/
H A Dmach_cpu_states.c1275 CPUSET_AND(cpuset, cpu_ready_set); in xt_sync()
/titanic_41/usr/src/uts/sfmmu/vm/
H A Dhat_sfmmu.c9893 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_ctx_wrap_around()
12173 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_rgntlb_demap()
12307 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_ismtlbcache_demap()
12386 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_tlbcache_demap()
12412 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_tlbcache_demap()
12453 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_tlb_demap()
12555 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_tlb_range_demap()
12641 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_invalidate_ctx()
/titanic_41/usr/src/uts/sun4u/vm/
H A Dmach_kpm.c1795 CPUSET_AND(cpuset, cpu_ready_set); in sfmmu_kpm_demap_tlbs()
/titanic_41/usr/src/uts/sun4u/starfire/io/
H A Didn_proto.c7316 CPUSET_AND(p_conflicts, dp->dcpuset); in idn_recv_config_done()