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Searched refs:COR_ENABLE_BASE_LIMIT (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/pcmcia/sys/
H A Dcs.h840 #define COR_ENABLE_BASE_LIMIT 0x02 /* enable base and limit registers */ macro
/titanic_41/usr/src/uts/common/pcmcia/cs/
H A Dcs.c6752 crt->cor |= COR_ENABLE_BASE_LIMIT;