Searched refs:CL22_WR_OVER_CL45 (Results 1 – 1 of 1) sorted by relevance
| /titanic_41/usr/src/uts/common/io/bnxe/577xx/common/ |
| H A D | bnxe_clc.c | 326 #define CL22_WR_OVER_CL45(_cb, _phy, _bank, _addr, _val) \ macro
3596 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_set_aer_mmd()
4020 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_restart_AN_KR()
4075 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR()
4136 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_enable_AN_KR()
4206 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_10G_KR()
4371 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2()
4409 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_set_20G_force_KR2()
4915 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_warpcore_link_reset()
4966 CL22_WR_OVER_CL45(cb, phy, MDIO_REG_BANK_AER_BLOCK, in elink_set_warpcore_loopback()
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