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Searched refs:CH_ICACHE_NWAY (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/sun4u/io/
H A Dgptwo_cpu.c538 "icache-associativity", CH_ICACHE_NWAY) != DDI_SUCCESS) { in set_cpu_us3_props()
770 "l1-icache-associativity", CH_ICACHE_NWAY) != DDI_SUCCESS) { in set_cpu_us4_props()
/titanic_41/usr/src/uts/sun4u/sys/
H A Dcheetahregs.h1015 #define CH_ICACHE_NWAY 4 macro
1477 ch_ic_data_t cpl_ic[CH_ICACHE_NWAY]; /* I$ data nWays */
/titanic_41/usr/src/uts/sun4u/cpu/
H A Dus3_common.c2309 for (way = 0; way < CH_ICACHE_NWAY; way++) { in cpu_async_log_ic_parity_err()
4111 CH_ICACHE_NWAY; in cpu_icache_parity_info()
4114 ic_set_size = icache_size / CH_ICACHE_NWAY; in cpu_icache_parity_info()
4141 CH_ICACHE_NWAY; in cpu_icache_parity_check()
4144 ic_set_size = icache_size / CH_ICACHE_NWAY; in cpu_icache_parity_check()
4165 for (way = 0; way < CH_ICACHE_NWAY; way++, icp++) { in cpu_icache_parity_check()
4373 ch_ic_data_t icdata[CH_ICACHE_NWAY]; in cpu_payload_add_icache()
4385 ways_to_check = CH_ICACHE_NWAY; in cpu_payload_add_icache()