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Searched refs:CHIP_REV_IS_FPGA (Results 1 – 6 of 6) sorted by relevance

/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/ecore/
H A Decore_init_ops.h512 if (CHIP_REV_IS_FPGA(pdev)) { in ecore_init_pxp_arb()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/device/
H A Dlm_hw_init_reset.c270 else if (CHIP_REV_IS_FPGA(pdev)) in lm_cleanup_after_flr()
2225 else if (CHIP_REV_IS_FPGA(pdev)) in lm_init_get_modes_bitmap()
2715 if (CHIP_REV_IS_FPGA(pdev) && CHIP_IS_E1H(pdev)) in init_pxp2_common()
3063 if (CHIP_REV_IS_EMUL(pdev) || (CHIP_REV_IS_FPGA(pdev) && CHIP_IS_E1(pdev))) in init_brb_port()
H A Dlm_devinfo.c3143 if(CHIP_REV_IS_FPGA(pdev)) in lm_init_params()
3413 if(CHIP_REV_IS_FPGA(pdev)) in lm_init_params()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/include/
H A Dlm5710.h1697 …#define CHIP_REV_IS_FPGA(_p) (CHIP_REV_IS_SLOW(_p) && (CHIP_REV(_p) & CHIP_REV_SIM_IS_FPGA)) macro
4291 if (CHIP_REV_IS_EMUL(pdev) || CHIP_REV_IS_FPGA(pdev)) { in DOORBELL()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/common/
H A Dbnxe_clc.c95 #define CHIP_REV_IS_FPGA(_chip_id) \ macro
2032 if (CHIP_REV_IS_FPGA(params->chip_id)) { in elink_emac_enable()
7141 if (CHIP_REV_IS_FPGA(params->chip_id)) in elink_test_link()
14030 if (CHIP_REV_IS_FPGA(params->chip_id)) { in elink_phy_init()
14131 !CHIP_REV_IS_FPGA(params->chip_id)) { in elink_link_reset()
14834 if (CHIP_REV_IS_EMUL(chip_id) || CHIP_REV_IS_FPGA(chip_id)) in elink_common_init_phy()
/titanic_41/usr/src/uts/common/io/bnxe/577xx/drivers/common/lm/vf/channel_vf/
H A Dlm_vf.c3242 else if (CHIP_REV_IS_FPGA(pdev)) in lm_pf_cleanup_vf_after_flr()