Searched refs:B3_RI_WTO_XS1 (Results 1 – 2 of 2) sorted by relevance
334 #define B3_RI_WTO_XS1 0x0192 /* 8 bit WR Timeout Queue XS1 (TO2) */ macro
803 CSR_WRITE_1(dev, SELECT_RAM_BUFFER(i, B3_RI_WTO_XS1), RI_TO_53); in yge_reset()