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Searched refs:A_TP_RESET (Results 1 – 3 of 3) sorted by relevance

/titanic_41/usr/src/uts/common/io/chxge/com/
H A Dtp.c427 t1_write_reg_4(adapter, A_TP_RESET, F_CM_MEMMGR_INIT); in t1_tp_reset()
428 busy = t1_wait_op_done(adapter, A_TP_RESET, F_CM_MEMMGR_INIT, in t1_tp_reset()
433 t1_write_reg_4(adapter, A_TP_RESET, F_TP_RESET); in t1_tp_reset()
H A Dregs.h1154 #define A_TP_RESET 0x44c macro
/titanic_41/usr/src/uts/common/io/cxgbe/common/
H A Dt4_regs.h9842 #define A_TP_RESET 0x7e4c macro