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Searched refs:A_SGE_TIMER_VALUE_4_AND_5 (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/common/io/cxgbe/t4nex/
H A Dt4_sge.c291 t4_write_reg(sc, A_SGE_TIMER_VALUE_4_AND_5, in t4_sge_init()
/titanic_41/usr/src/uts/common/io/cxgbe/common/
H A Dt4_regs.h1203 #define A_SGE_TIMER_VALUE_4_AND_5 0x10c0 macro