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Searched refs:AMD_IOMMU_REG_SET32 (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_cmd.c62 AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_S, 0); in create_compl_wait_cmd()
63 AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_I, 1); in create_compl_wait_cmd()
64 AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_F, in create_compl_wait_cmd()
66 AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_LO, in create_compl_wait_cmd()
68 AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x01); in create_compl_wait_cmd()
69 AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_COMPL_WAIT_STORE_ADDR_HI, in create_compl_wait_cmd()
97 AMD_IOMMU_REG_SET32(&cmdptr[0], AMD_IOMMU_CMD_INVAL_DEVTAB_DEVICEID, in create_inval_devtab_entry_cmd()
99 AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x02); in create_inval_devtab_entry_cmd()
122 AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_INVAL_PAGES_DOMAINID, in create_inval_iommu_pages_cmd()
124 AMD_IOMMU_REG_SET32(&cmdptr[1], AMD_IOMMU_CMD_OPCODE, 0x03); in create_inval_iommu_pages_cmd()
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H A Damd_iommu_impl.h311 #define AMD_IOMMU_REG_SET32(rp, b, v) \ macro