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Searched refs:AMD_IOMMU_REG_GET64 (Results 1 – 5 of 5) sorted by relevance

/titanic_41/usr/src/uts/i86pc/io/amd_iommu/
H A Damd_iommu_page_tables.c335 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 0 && in init_devtbl()
336 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) { in init_devtbl()
340 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V) == 1 && in init_devtbl()
341 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 1) { in init_devtbl()
344 AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), in init_devtbl()
347 ASSERT(dp->d_domainid == AMD_IOMMU_REG_GET64(&(devtbl_entry[1]), in init_devtbl()
449 V = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_V); in amd_iommu_set_passthru()
450 TV = AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV); in amd_iommu_set_passthru()
590 if (AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), AMD_IOMMU_DEVTBL_TV) == 0) { in amd_iommu_clear_devtbl_entry()
595 ASSERT(dp->d_pgtable_root_4K == AMD_IOMMU_REG_GET64(&(devtbl_entry[0]), in amd_iommu_clear_devtbl_entry()
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H A Damd_iommu_cmd.c37 while (AMD_IOMMU_REG_GET64(REGADDR64( in amd_iommu_wait_for_completion()
116 addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr), in create_inval_iommu_pages_cmd()
118 addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr), in create_inval_iommu_pages_cmd()
147 addr_lo = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr), in create_inval_iotlb_pages_cmd()
150 addr_hi = AMD_IOMMU_REG_GET64(REGADDR64(&cmdargsp->ca_addr), in create_inval_iotlb_pages_cmd()
266 cmdhead_off = AMD_IOMMU_REG_GET64( in amd_iommu_cmd()
H A Damd_iommu_impl.h291 #define AMD_IOMMU_REG_GET64(rp, b) \ macro
H A Damd_iommu_impl.c546 ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va), in amd_iommu_enable_interrupts()
548 ASSERT(AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va), in amd_iommu_enable_interrupts()
624 if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va), in amd_iommu_intr_handler()
638 if (AMD_IOMMU_REG_GET64(REGADDR64(iommu->aiomt_reg_status_va), in amd_iommu_intr_handler()
H A Damd_iommu_log.c522 evtail_off = AMD_IOMMU_REG_GET64( in amd_iommu_read_log()