Home
last modified time | relevance | path

Searched refs:AMD_HWCR_TLBCACHEDIS (Results 1 – 2 of 2) sorted by relevance

/titanic_41/usr/src/uts/intel/sys/
H A Dcontrolregs.h199 #define AMD_HWCR_TLBCACHEDIS (UINT64_C(1) << 3) macro
/titanic_41/usr/src/uts/i86pc/os/
H A Dmp_startup.c771 if (((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) || in do_erratum_298()
783 (((rdmsr(MSR_AMD_HWCR) & AMD_HWCR_TLBCACHEDIS) == 0) || in do_erratum_298()