Searched refs:AMD_HWCR_MCI_STATUS_WREN (Results 1 – 4 of 4) sorted by relevance
143 #define AMD_HWCR_MCI_STATUS_WREN 0x40000 /* enable write of MCi_STATUS */ macro
201 #define AMD_HWCR_MCI_STATUS_WREN 0x40000 /* enable write of MCi_STATUS */ macro
830 if (!(hwcr & AMD_HWCR_MCI_STATUS_WREN)) { in ao_bankstatus_prewrite()831 hwcr |= AMD_HWCR_MCI_STATUS_WREN; in ao_bankstatus_prewrite()844 if (!(hwcr & AMD_HWCR_MCI_STATUS_WREN)) { in ao_bankstatus_postwrite()845 hwcr &= ~AMD_HWCR_MCI_STATUS_WREN; in ao_bankstatus_postwrite()
256 if (!(hwcr & AMD_HWCR_MCI_STATUS_WREN)) { in authamd_bankstatus_prewrite()257 hwcr |= AMD_HWCR_MCI_STATUS_WREN; in authamd_bankstatus_prewrite()267 if (!(hwcr & AMD_HWCR_MCI_STATUS_WREN)) { in authamd_bankstatus_postwrite()268 hwcr &= ~AMD_HWCR_MCI_STATUS_WREN; in authamd_bankstatus_postwrite()