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Searched refs:ACPI_RS_OFFSET (Results 1 – 6 of 6) sorted by relevance

/titanic_41/usr/src/uts/intel/io/acpica/resources/
H A Drsserial.c73 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Gpio.RevisionId),
77 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Gpio.ProducerConsumer),
81 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Gpio.Sharable),
85 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Gpio.WakeCapable),
89 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Gpio.IoRestriction),
93 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Gpio.Triggering),
97 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Gpio.Polarity),
101 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Gpio.PinConfig),
110 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.Gpio.DriveStrength),
116 {ACPI_RSC_COUNT_GPIO_PIN, ACPI_RS_OFFSET (Data.Gpio.PinTableLength),
[all …]
H A Drsirq.c66 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
68 ACPI_RS_OFFSET (Data.Irq.InterruptCount)},
72 {ACPI_RSC_SET8, ACPI_RS_OFFSET (Data.Irq.Triggering),
78 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.Irq.DescriptorLength),
88 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Triggering),
92 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Polarity),
96 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.Sharable),
100 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Irq.WakeCapable),
122 {ACPI_RSC_BITMASK16,ACPI_RS_OFFSET (Data.Irq.Interrupts[0]),
124 ACPI_RS_OFFSET (Data.Irq.InterruptCount)},
[all …]
H A Drsio.c70 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Io.IoDecode),
80 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Io.Alignment),
84 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.Io.Minimum),
110 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.FixedIo.AddressLength),
114 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.FixedIo.Address),
142 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.GenericReg.SpaceId),
148 {ACPI_RSC_MOVE64, ACPI_RS_OFFSET (Data.GenericReg.Address),
209 {ACPI_RSC_SET8, ACPI_RS_OFFSET (Data.StartDpf.CompatibilityPriority),
215 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.StartDpf.DescriptorLength),
225 {ACPI_RSC_2BITFLAG, ACPI_RS_OFFSET (Data.StartDpf.CompatibilityPriority),
[all …]
H A Drsmemory.c70 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Memory24.WriteProtect),
80 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.Memory24.Minimum),
104 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Memory32.WriteProtect),
114 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.Memory32.Minimum),
138 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.FixedMemory32.WriteProtect),
146 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.FixedMemory32.Address),
166 {ACPI_RSC_COUNT16, ACPI_RS_OFFSET (Data.Vendor.ByteLength),
172 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Vendor.ByteData[0]),
192 {ACPI_RSC_COUNT16, ACPI_RS_OFFSET (Data.Vendor.ByteLength),
198 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Vendor.ByteData[0]),
[all …]
H A Drsaddr.c80 {ACPI_RSC_MOVE16, ACPI_RS_OFFSET (Data.Address16.Address.Granularity),
86 {ACPI_RSC_SOURCE, ACPI_RS_OFFSET (Data.Address16.ResourceSource),
120 {ACPI_RSC_MOVE32, ACPI_RS_OFFSET (Data.Address32.Address.Granularity),
126 {ACPI_RSC_SOURCE, ACPI_RS_OFFSET (Data.Address32.ResourceSource),
160 {ACPI_RSC_MOVE64, ACPI_RS_OFFSET (Data.Address64.Address.Granularity),
166 {ACPI_RSC_SOURCE, ACPI_RS_OFFSET (Data.Address64.ResourceSource),
194 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.ExtAddress64.RevisionID),
206 {ACPI_RSC_MOVE64, ACPI_RS_OFFSET (Data.ExtAddress64.Address.Granularity),
225 {ACPI_RSC_MOVE8, ACPI_RS_OFFSET (Data.Address.ResourceType),
231 {ACPI_RSC_1BITFLAG, ACPI_RS_OFFSET (Data.Address.ProducerConsumer),
[all …]
/titanic_41/usr/src/uts/intel/sys/acpi/
H A Dacresrc.h122 #define ACPI_RS_OFFSET(f) (UINT8) ACPI_OFFSET (ACPI_RESOURCE,f) macro