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Searched refs:xlut (Results 1 – 5 of 5) sorted by relevance

/linux/drivers/gpu/drm/nouveau/dispnv50/
H A Dwndwc57e.c135 NVVAL(NVC57E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) | in wndwc57e_ilut_set()
136 NVVAL(NVC57E, SET_ILUT_CONTROL, MODE, asyw->xlut.i.mode) | in wndwc57e_ilut_set()
137 NVVAL(NVC57E, SET_ILUT_CONTROL, INTERPOLATE, asyw->xlut.i.output_mode), in wndwc57e_ilut_set()
139 SET_CONTEXT_DMA_ILUT, asyw->xlut.handle, in wndwc57e_ilut_set()
140 SET_OFFSET_ILUT, asyw->xlut.i.offset >> 8); in wndwc57e_ilut_set()
187 asyw->xlut.i.mode = NVC57E_SET_ILUT_CONTROL_MODE_DIRECT8; in wndwc57e_ilut()
189 asyw->xlut.i.mode = NVC57E_SET_ILUT_CONTROL_MODE_DIRECT10; in wndwc57e_ilut()
191 asyw->xlut.i.size = 4 /* VSS header. */ + size + 1 /* Entries. */; in wndwc57e_ilut()
192 asyw->xlut.i.output_mode = NVC57E_SET_ILUT_CONTROL_INTERPOLATE_DISABLE; in wndwc57e_ilut()
193 asyw->xlut.i.load = wndwc57e_ilut_load; in wndwc57e_ilut()
H A Dbase907c.c94 NVVAL(NV907C, SET_BASE_LUT_LO, ENABLE, asyw->xlut.i.enable) | in base907c_xlut_set()
95 NVVAL(NV907C, SET_BASE_LUT_LO, MODE, asyw->xlut.i.mode), in base907c_xlut_set()
97 SET_BASE_LUT_HI, asyw->xlut.i.offset >> 8, in base907c_xlut_set()
102 PUSH_MTHD(push, NV907C, SET_CONTEXT_DMA_LUT, asyw->xlut.handle); in base907c_xlut_set()
110 asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_1025_UNITY_RANGE; in base907c_ilut()
112 asyw->xlut.i.mode = NV907C_SET_BASE_LUT_LO_MODE_INTERPOLATE_257_UNITY_RANGE; in base907c_ilut()
114 asyw->xlut.i.enable = NV907C_SET_BASE_LUT_LO_ENABLE_ENABLE; in base907c_ilut()
115 asyw->xlut.i.load = head907d_olut_load; in base907c_ilut()
H A Dwndw.c141 if (clr.xlut ) wndw->func-> xlut_clr(wndw); in nv50_wndw_flush_clr()
161 if (asyw->set.xlut ) { in nv50_wndw_flush_set()
163 asyw->xlut.i.offset = in nv50_wndw_flush_set()
164 nv50_lut_load(&wndw->ilut, asyw->xlut.i.buffer, in nv50_wndw_flush_set()
165 asyw->ilut, asyw->xlut.i.load); in nv50_wndw_flush_set()
209 asyw->xlut.handle = 0; in nv50_wndw_atomic_check_release()
412 memset(&asyw->xlut, 0x00, sizeof(asyw->xlut)); in nv50_wndw_atomic_check_lut()
415 asyw->xlut.handle = wndw->wndw.vram.handle; in nv50_wndw_atomic_check_lut()
416 asyw->xlut.i.buffer = !asyw->xlut.i.buffer; in nv50_wndw_atomic_check_lut()
417 asyw->set.xlut = true; in nv50_wndw_atomic_check_lut()
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H A Dwndwca7e.c115 const u32 ilut_hi = upper_32_bits(asyw->xlut.i.offset); in wndwca7e_ilut_set()
116 const u32 ilut_lo = lower_32_bits(asyw->xlut.i.offset); in wndwca7e_ilut_set()
132 NVVAL(NVCA7E, SET_ILUT_CONTROL, SIZE, asyw->xlut.i.size) | in wndwca7e_ilut_set()
133 NVVAL(NVCA7E, SET_ILUT_CONTROL, MODE, asyw->xlut.i.mode) | in wndwca7e_ilut_set()
134 NVVAL(NVCA7E, SET_ILUT_CONTROL, INTERPOLATE, asyw->xlut.i.output_mode)); in wndwca7e_ilut_set()
H A Datom.h220 } xlut; member
270 bool xlut:1; member