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Searched refs:xCR (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/mailbox/
H A Dimx-mailbox.c124 u32 xCR[IMX_MU_xCR_MAX]; /* Control Registers */ member
214 val = imx_mu_read(priv, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
217 imx_mu_write(priv, val, priv->dcfg->xCR[type]); in imx_mu_xcr_rmw()
242 priv->dcfg->xCR[IMX_MU_GCR]); in imx_mu_generic_tx()
243 ret = readl_poll_timeout(priv->base + priv->dcfg->xCR[IMX_MU_GCR], val, in imx_mu_generic_tx()
512 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_TCR]); in imx_mu_isr()
518 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_RCR]); in imx_mu_isr()
524 ctrl = imx_mu_read(priv, priv->dcfg->xCR[IMX_MU_GIER]); in imx_mu_isr()
796 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_generic()
830 imx_mu_write(priv, 0, priv->dcfg->xCR[i]); in imx_mu_init_specific()
[all …]
/linux/drivers/irqchip/
H A Dirq-imx-mu-msi.c60 u32 xCR[IMX_MU_xCR_MAX]; /* Control Registers */ member
89 val = imx_mu_read(msi_data, msi_data->cfg->xCR[type]); in imx_mu_xcr_rmw()
92 imx_mu_write(msi_data, val, msi_data->cfg->xCR[type]); in imx_mu_xcr_rmw()
254 .xCR = {
272 .xCR = {
290 .xCR = {