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Searched refs:x86_pmu (Results 1 – 5 of 5) sorted by relevance

/linux/arch/x86/events/
H A Dcore.c52 struct x86_pmu x86_pmu __read_mostly;
70 DEFINE_STATIC_CALL_NULL(x86_pmu_handle_irq, *x86_pmu.handle_irq);
71 DEFINE_STATIC_CALL_NULL(x86_pmu_disable_all, *x86_pmu.disable_all);
72 DEFINE_STATIC_CALL_NULL(x86_pmu_enable_all, *x86_pmu.enable_all);
73 DEFINE_STATIC_CALL_NULL(x86_pmu_enable, *x86_pmu.enable);
74 DEFINE_STATIC_CALL_NULL(x86_pmu_disable, *x86_pmu.disable);
76 DEFINE_STATIC_CALL_NULL(x86_pmu_assign, *x86_pmu.assign);
78 DEFINE_STATIC_CALL_NULL(x86_pmu_add, *x86_pmu.add);
79 DEFINE_STATIC_CALL_NULL(x86_pmu_del, *x86_pmu.del);
80 DEFINE_STATIC_CALL_NULL(x86_pmu_read, *x86_pmu.read);
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H A Dperf_event.h800 typeof(&x86_pmu._field) __Fp = &x86_pmu._field; \
820 bool __Fp = x86_pmu._field; \
831 struct x86_pmu { struct
1104 __quirk.next = x86_pmu.quirks; \
1105 x86_pmu.quirks = &__quirk; \
1167 extern struct x86_pmu x86_pmu __read_mostly;
1169 DECLARE_STATIC_CALL(x86_pmu_set_period, *x86_pmu.set_period);
1170 DECLARE_STATIC_CALL(x86_pmu_update, *x86_pmu.update);
1171 DECLARE_STATIC_CALL(x86_pmu_drain_pebs, *x86_pmu.drain_pebs);
1172 DECLARE_STATIC_CALL(x86_pmu_late_setup, *x86_pmu.late_setup);
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/linux/arch/x86/events/intel/
H A Dcore.c2564 cnt = min_t(unsigned int, cnt, x86_pmu.lbr_nr); in __intel_pmu_snapshot_branch_stack()
2784 x86_pmu.addr_offset(idx, false); in __intel_pmu_update_event_ext()
2787 x86_pmu.addr_offset(idx - INTEL_PMC_IDX_FIXED, false); in __intel_pmu_update_event_ext()
2889 if (left == x86_pmu.max_period) { in icl_set_topdown_event_period()
3056 x86_pmu.num_topdown_events - 1, in icl_update_topdown_event()
3137 if (x86_pmu.version > 2 && hwc->config & ARCH_PERFMON_EVENTSEL_ANY) in intel_pmu_enable_fixed()
3142 if (x86_pmu.intel_cap.pebs_baseline && event->attr.precise_ip) in intel_pmu_enable_fixed()
3161 msr_offset = x86_pmu.addr_offset(idx, false); in intel_pmu_config_acr()
3165 msr_offset = x86_pmu.addr_offset(idx - INTEL_PMC_IDX_FIXED, false); in intel_pmu_config_acr()
3281 if (x86_pmu.attr_rdpmc == X86_USER_RDPMC_ALWAYS_ENABLE || in intel_pmu_update_rdpmc_user_disable()
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H A Dds.c184 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX].pebs_data_source; in intel_pmu_pebs_data_source_adl()
188 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX].pebs_data_source; in intel_pmu_pebs_data_source_adl()
207 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX].pebs_data_source; in intel_pmu_pebs_data_source_mtl()
211 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX].pebs_data_source; in intel_pmu_pebs_data_source_mtl()
222 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_TINY_IDX].pebs_data_source; in intel_pmu_pebs_data_source_arl_h()
258 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_CORE_IDX].pebs_data_source; in intel_pmu_pebs_data_source_lnl()
261 data_source = x86_pmu.hybrid_pmu[X86_HYBRID_PMU_ATOM_IDX].pebs_data_source; in intel_pmu_pebs_data_source_lnl()
655 if (x86_pmu.pebs_no_tlb) { in load_latency_data()
665 if (!x86_pmu.pebs_block) { in load_latency_data()
851 size_t bsiz = x86_pmu.pebs_buffer_size; in alloc_pebs_buffer()
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H A Dbts.c606 x86_pmu.bts = boot_cpu_has(X86_FEATURE_BTS); in bts_init()
607 if (!x86_pmu.bts) in bts_init()