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Searched refs:wrl (Results 1 – 2 of 2) sorted by relevance

/linux/drivers/net/ethernet/cirrus/
H A Dep93xx_eth.c181 #define wrl(ep, off, val) __raw_writel((val), (ep)->base_addr + (off)) macro
189 wrl(ep, REG_MIICMD, REG_MIICMD_READ | (phy_id << 5) | reg); in ep93xx_mdio_read()
212 wrl(ep, REG_MIIDATA, data); in ep93xx_mdio_write()
213 wrl(ep, REG_MIICMD, REG_MIICMD_WRITE | (phy_id << 5) | reg); in ep93xx_mdio_write()
317 wrl(ep, REG_INTEN, REG_INTEN_TX | REG_INTEN_RX); in ep93xx_poll()
360 wrl(ep, REG_TXDENQ, 1); in ep93xx_xmit()
431 wrl(ep, REG_INTEN, REG_INTEN_TX); in ep93xx_irq()
536 wrl(ep, REG_SELFCTL, REG_SELFCTL_RESET); in ep93xx_start_hw()
548 wrl(ep, REG_SELFCTL, ((ep->mdc_divisor - 1) << 9)); in ep93xx_start_hw()
552 wrl(ep, REG_SELFCTL, ((ep->mdc_divisor - 1) << 9) | (1 << 8)); in ep93xx_start_hw()
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/linux/drivers/net/ethernet/marvell/
H A Dpxa168_eth.c278 static inline void wrl(struct pxa168_eth_private *pep, int offset, u32 data) in wrl() function
289 wrl(pep, SDMA_CMD, SDMA_CMD_AR | SDMA_CMD_AT); in abort_dma()
557 wrl(pep, HTPR, pep->htpr_dma); in init_hash_table()
572 wrl(pep, PORT_CONFIG, val); in pxa168_eth_set_rx_mode()
618 wrl(pep, MAC_ADDR_HIGH, mac_h); in pxa168_eth_set_mac_address()
619 wrl(pep, MAC_ADDR_LOW, mac_l); in pxa168_eth_set_mac_address()
637 wrl(pep, ETH_C_TX_DESC_1, in eth_port_start()
642 wrl(pep, ETH_C_RX_DESC_0, in eth_port_start()
645 wrl(pep, ETH_F_RX_DESC_0, in eth_port_start()
649 wrl(pep, INT_CAUSE, 0); in eth_port_start()
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