Searched refs:writer_wm_sets (Results 1 – 3 of 3) sorted by relevance
94 struct pp_smu_wm_set_range writer_wm_sets[MAX_WATERMARK_SETS]; member
1390 ranges.writer_wm_sets[0].wm_inst = 0; in set_wm_ranges()1391 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1392 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()1393 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in set_wm_ranges()1394 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()
2650 ranges.writer_wm_sets[0].wm_inst = 0; in dcn20_resource_construct()2651 ranges.writer_wm_sets[0].min_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2652 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()2653 ranges.writer_wm_sets[0].min_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MIN; in dcn20_resource_construct()2654 ranges.writer_wm_sets[0].max_drain_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()