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Searched refs:write_sysreg_s (Results 1 – 25 of 30) sorted by relevance

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/linux/arch/arm64/include/asm/
H A Darm_dsu_pmu.h40 write_sysreg_s(val, CLUSTERPMCR_EL1); in __dsu_pmu_write_pmcr()
48 write_sysreg_s(val, CLUSTERPMOVSCLR_EL1); in __dsu_pmu_get_reset_overflow()
55 write_sysreg_s(counter, CLUSTERPMSELR_EL1); in __dsu_pmu_select_counter()
68 write_sysreg_s(val, CLUSTERPMXEVCNTR_EL1); in __dsu_pmu_write_counter()
75 write_sysreg_s(event, CLUSTERPMXEVTYPER_EL1); in __dsu_pmu_set_event()
86 write_sysreg_s(val, CLUSTERPMCCNTR_EL1); in __dsu_pmu_write_pmccntr()
92 write_sysreg_s(BIT(counter), CLUSTERPMCNTENCLR_EL1); in __dsu_pmu_disable_counter()
98 write_sysreg_s(BIT(counter), CLUSTERPMCNTENSET_EL1); in __dsu_pmu_enable_counter()
104 write_sysreg_s(BIT(counter), CLUSTERPMINTENSET_EL1); in __dsu_pmu_counter_interrupt_enable()
110 write_sysreg_s(BIT(counter), CLUSTERPMINTENCLR_EL1); in __dsu_pmu_counter_interrupt_disable()
H A Darch_gicv3.h20 #define write_gicreg(v, r) write_sysreg_s(v, SYS_ ## r)
31 write_sysreg_s(irq, SYS_ICC_DIR_EL1); in gic_write_dir()
92 write_sysreg_s(val, SYS_ICC_CTLR_EL1); in gic_write_ctlr()
103 write_sysreg_s(val, SYS_ICC_IGRPEN1_EL1); in gic_write_grpen1()
109 write_sysreg_s(val, SYS_ICC_SGI1R_EL1); in gic_write_sgi1r()
119 write_sysreg_s(val, SYS_ICC_SRE_EL1); in gic_write_sre()
125 write_sysreg_s(val, SYS_ICC_BPR1_EL1); in gic_write_bpr1()
135 write_sysreg_s(val, SYS_ICC_PMR_EL1); in gic_write_pmr()
H A Dkvm_host.h1074 case SCTLR_EL1: write_sysreg_s(val, SYS_SCTLR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1075 case CPACR_EL1: write_sysreg_s(val, SYS_CPACR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1076 case TTBR0_EL1: write_sysreg_s(val, SYS_TTBR0_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1077 case TTBR1_EL1: write_sysreg_s(val, SYS_TTBR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1078 case TCR_EL1: write_sysreg_s(val, SYS_TCR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1079 case ESR_EL1: write_sysreg_s(val, SYS_ESR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1080 case AFSR0_EL1: write_sysreg_s(val, SYS_AFSR0_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1081 case AFSR1_EL1: write_sysreg_s(val, SYS_AFSR1_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1082 case FAR_EL1: write_sysreg_s(val, SYS_FAR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
1083 case MAIR_EL1: write_sysreg_s(val, SYS_MAIR_EL12); break; in __vcpu_write_sys_reg_to_cpu()
[all …]
H A Dirqflags.h38 write_sysreg_s(GIC_PRIO_IRQON, SYS_ICC_PMR_EL1); in __pmr_local_irq_enable()
67 write_sysreg_s(GIC_PRIO_IRQOFF, SYS_ICC_PMR_EL1); in __pmr_local_irq_disable()
182 write_sysreg_s(flags, SYS_ICC_PMR_EL1); in __pmr_local_irq_restore()
H A Dkvm_hyp.h28 #define write_sysreg_el0(v,r) write_sysreg_s(v, r##_EL02)
30 #define write_sysreg_el1(v,r) write_sysreg_s(v, r##_EL12)
32 #define write_sysreg_el2(v,r) write_sysreg_s(v, r##_EL1)
H A Darm_pmuv3.h92 write_sysreg_s(val, SYS_PMICNTR_EL0); in write_pmicntr()
132 write_sysreg_s(val, SYS_PMICFILTR_EL0); in write_pmicfiltr()
H A Dpointer_auth.h47 write_sysreg_s(__pki_v.lo, SYS_ ## k ## KEYLO_EL1); \
48 write_sysreg_s(__pki_v.hi, SYS_ ## k ## KEYHI_EL1); \
H A Dfpsimd.h226 write_sysreg_s(__new, (reg)); \
250 write_sysreg_s(tmp | val, SYS_ZCR_EL1); in write_vl()
256 write_sysreg_s(tmp | val, SYS_SMCR_EL1); in write_vl()
/linux/drivers/soc/qcom/
H A Dkryo-l2-accessors.c29 write_sysreg_s(reg, L2CPUSRSELR_EL1); in kryo_l2_set_indirect_reg()
31 write_sysreg_s(val, L2CPUSRDR_EL1); in kryo_l2_set_indirect_reg()
50 write_sysreg_s(reg, L2CPUSRSELR_EL1); in kryo_l2_get_indirect_reg()
/linux/tools/testing/selftests/kvm/lib/aarch64/
H A Dgic_v3.c104 write_sysreg_s(irq, SYS_ICC_EOIR1_EL1); in gicv3_write_eoir()
110 write_sysreg_s(irq, SYS_ICC_DIR_EL1); in gicv3_write_dir()
116 write_sysreg_s(mask, SYS_ICC_PMR_EL1); in gicv3_set_priority_mask()
128 write_sysreg_s(val, SYS_ICC_CTLR_EL1); in gicv3_set_eoi_split()
325 write_sysreg_s(read_sysreg_s(SYS_ICC_SRE_EL1) | ICC_SRE_EL1_SRE, in gicv3_cpu_init()
329 write_sysreg_s(ICC_PMR_DEF_PRIO, SYS_ICC_PMR_EL1); in gicv3_cpu_init()
332 write_sysreg_s(ICC_IGRPEN1_EL1_MASK, SYS_ICC_IGRPEN1_EL1); in gicv3_cpu_init()
/linux/arch/arm64/kernel/
H A Dmte.c156 write_sysreg_s(0, SYS_TFSR_EL1); in mte_check_tfsr_el1()
210 write_sysreg_s( in mte_update_gcr_excl()
238 write_sysreg_s(0, SYS_TFSRE0_EL1); in mte_thread_init_user()
288 write_sysreg_s(KERNEL_GCR_EL1, SYS_GCR_EL1); in mte_cpu_setup()
300 write_sysreg_s(rgsr, SYS_RGSR_EL1); in mte_cpu_setup()
303 write_sysreg_s(0, SYS_TFSR_EL1); in mte_cpu_setup()
304 write_sysreg_s(0, SYS_TFSRE0_EL1); in mte_cpu_setup()
H A Dfpsimd.c363 write_sysreg_s(current->thread.uw.fpmr, SYS_FPMR); in task_fpsimd_load()
406 write_sysreg_s(current->thread.svcr, SYS_SVCR); in task_fpsimd_load()
699 write_sysreg_s(read_sysreg_s(SYS_SCTLR_EL1) | SCTLR_EL1_EnFPM_MASK, in cpu_enable_fpmr()
1150 write_sysreg_s(0, SYS_ZCR_EL1); in cpu_enable_sve()
1255 write_sysreg_s(read_sysreg_s(SYS_SMPRI_EL1) & ~SMPRI_EL1_PRIORITY_MASK, in cpu_enable_sme()
1263 write_sysreg_s(0, SYS_SMCR_EL1); in cpu_enable_sme()
1276 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_EZT0_MASK, in cpu_enable_sme2()
1286 write_sysreg_s(read_sysreg_s(SYS_SMCR_EL1) | SMCR_ELx_FA64_MASK, in cpu_enable_fa64()
1343 write_sysreg_s(smcr, SYS_SMCR_EL1); in sme_suspend_exit()
1344 write_sysreg_s(0, SYS_SMPRI_EL1); in sme_suspend_exit()
H A Dprocess.c254 write_sysreg_s(0, SYS_TPIDR2_EL0); in tls_thread_flush()
280 write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); in flush_poe()
447 write_sysreg_s(next->thread.tpidr2_el0, SYS_TPIDR2_EL0); in tls_thread_switch()
543 write_sysreg_s(next->thread.por_el0, SYS_POR_EL0); in permission_overlay_switch()
H A Dsignal.c259 write_sysreg_s(fpmr, SYS_FPMR); in restore_fpmr_context()
285 write_sysreg_s(por_el0, SYS_POR_EL0); in restore_poe_context()
461 write_sysreg_s(tpidr2_el0, SYS_TPIDR2_EL0); in restore_tpidr2_context()
1241 write_sysreg_s(POR_EL0_INIT, SYS_POR_EL0); in setup_return()
/linux/drivers/perf/
H A Darm_spe_pmu.c524 write_sysreg_s(base, SYS_PMBPTR_EL1); in arm_spe_perf_aux_output_begin()
527 write_sysreg_s(limit, SYS_PMBLIMITR_EL1); in arm_spe_perf_aux_output_begin()
547 write_sysreg_s(0, SYS_PMSCR_EL1); in arm_spe_pmu_disable_and_drain_local()
555 write_sysreg_s(0, SYS_PMBLIMITR_EL1); in arm_spe_pmu_disable_and_drain_local()
677 write_sysreg_s(0, SYS_PMBSR_EL1); in arm_spe_pmu_irq_handler()
767 write_sysreg_s(reg, SYS_PMSFCR_EL1); in arm_spe_pmu_start()
770 write_sysreg_s(reg, SYS_PMSEVFR_EL1); in arm_spe_pmu_start()
774 write_sysreg_s(reg, SYS_PMSNEVFR_EL1); in arm_spe_pmu_start()
778 write_sysreg_s(reg, SYS_PMSLATFR_EL1); in arm_spe_pmu_start()
782 write_sysreg_s(reg, SYS_PMSIRR_EL1); in arm_spe_pmu_start()
[all …]
H A Dapple_m1_cpu_pmu.c217 write_sysreg_s(_val, SYS_IMP_APL_PMC## _idx ##_EL1); \
280 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter()
315 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_enable_counter_interrupt()
359 write_sysreg_s(val, SYS_IMP_APL_PMCR1_EL1); in m1_pmu_configure_counter()
375 write_sysreg_s(val, SYS_IMP_APL_PMESR0_EL1); in m1_pmu_configure_counter()
382 write_sysreg_s(val, SYS_IMP_APL_PMESR1_EL1); in m1_pmu_configure_counter()
426 write_sysreg_s(state, SYS_IMP_APL_PMCR0_EL1); in m1_pmu_handle_irq()
503 write_sysreg_s(val, SYS_IMP_APL_PMCR0_EL1); in __m1_pmu_set_mode()
/linux/drivers/hwtracing/coresight/
H A Dcoresight-trbe.h61 write_sysreg_s(trbsr, SYS_TRBSR_EL1); in clr_trbe_irq()
112 write_sysreg_s(addr, SYS_TRBPTR_EL1); in set_trbe_write_pointer()
138 write_sysreg_s(addr, SYS_TRBBASER_EL1); in set_trbe_base_pointer()
H A Dcoresight-self-hosted-trace.h20 write_sysreg_s(val, SYS_TRFCR_EL1); in write_trfcr()
/linux/arch/arm64/kvm/hyp/include/hyp/
H A Dswitch.h124 write_sysreg_s(val, SYS_ ## reg); \
182 write_sysreg_s(ctxt_sys_reg(hctxt, reg), \
196 write_sysreg_s(ctxt_sys_reg(hctxt, HFGWTR_EL2), SYS_HFGWTR_EL2); in __deactivate_traps_hfgxtr()
243 write_sysreg_s(hcrx, SYS_HCRX_EL2); in __activate_traps_common()
263 write_sysreg_s(HCRX_HOST_FLAGS, SYS_HCRX_EL2); in __deactivate_traps_common()
276 write_sysreg_s(vcpu->arch.vsesr_el2, SYS_VSESR_EL2); in ___activate_traps()
341 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2); in __hyp_sve_save_host()
407 write_sysreg_s(__vcpu_sys_reg(vcpu, FPMR), SYS_FPMR); in kvm_hyp_handle_fpsimd()
H A Dsysreg-sr.h146 write_sysreg_s(ctxt_sys_reg(ctxt, POR_EL0), SYS_POR_EL0); in __sysreg_restore_common_state()
203 write_sysreg_s(ctxt_sys_reg(ctxt, TFSRE0_EL1), SYS_TFSRE0_EL1); in __sysreg_restore_el1_state()
269 write_sysreg_s(ctxt_sys_reg(ctxt, DISR_EL1), SYS_VDISR_EL2); in __sysreg_restore_el2_return_state()
/linux/arch/arm64/kvm/hyp/nvhe/
H A Dhyp-main.c36 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2); in __hyp_sve_save_guest()
51 write_sysreg_s(ZCR_ELx_LEN_MASK, SYS_ZCR_EL2); in __hyp_sve_restore_host()
88 write_sysreg_s(*host_data_ptr(fpmr), SYS_FPMR); in fpsimd_sve_sync()
/linux/tools/testing/selftests/kvm/aarch64/
H A Dno-vgic-v3.c26 write_sysreg_s(0, SYS_ ## r); \
/linux/tools/arch/arm64/include/asm/
H A Dsysreg.h799 #define write_sysreg_s(v, r) do { \ macro
819 write_sysreg_s(__scs_new, sysreg); \
/linux/arch/arm64/kvm/hyp/vhe/
H A Dswitch.c62 write_sysreg_s(vcpu->arch.ctxt.vncr_array, SYS_VNCR_EL2); in __compute_hcr()
/linux/arch/arm64/kvm/
H A Dat.c458 write_sysreg_s(*vcpu_cpsr(vcpu) & PSTATE_PAN, SYS_PSTATE_PAN); in at_s1e1p_fast()
469 write_sysreg_s(host_pan, SYS_PSTATE_PAN); in at_s1e1p_fast()

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