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Searched refs:wptr_addr (Results 1 – 17 of 17) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dsi_ih.c85 WREG32(IH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr)); in si_ih_irq_init()
86 WREG32(IH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF); in si_ih_irq_init()
H A Damdgpu_mes.h267 uint64_t wptr_addr; member
303 uint64_t wptr_addr; member
343 uint64_t wptr_addr; member
H A Dcik_ih.c136 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr)); in cik_ih_irq_init()
137 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF); in cik_ih_irq_init()
H A Diceland_ih.c138 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr)); in iceland_ih_irq_init()
139 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF); in iceland_ih_irq_init()
H A Dcz_ih.c138 WREG32(mmIH_RB_WPTR_ADDR_LO, lower_32_bits(ih->wptr_addr)); in cz_ih_irq_init()
139 WREG32(mmIH_RB_WPTR_ADDR_HI, upper_32_bits(ih->wptr_addr) & 0xFF); in cz_ih_irq_init()
H A Dmes_v11_0.c354 mes_add_queue_pkt.wptr_addr = input->wptr_mc_addr; in mes_v11_0_add_hw_queue()
356 mes_add_queue_pkt.wptr_addr = input->wptr_addr; in mes_v11_0_add_hw_queue()
740 mes_add_queue_pkt.wptr_addr = input->wptr_addr; in mes_v11_0_map_legacy_queue()
1090 mes_reset_queue_pkt.wptr_addr_lp = input->wptr_addr; in mes_v11_0_reset_hw_queue()
H A Dih_v6_1.c269 WREG32(ih_regs->ih_rb_wptr_addr_lo, lower_32_bits(ih->wptr_addr)); in ih_v6_1_enable_ring()
270 WREG32(ih_regs->ih_rb_wptr_addr_hi, upper_32_bits(ih->wptr_addr) & 0xFFFF); in ih_v6_1_enable_ring()
H A Dmes_v12_1.c320 mes_add_queue_pkt.wptr_addr = input->wptr_mc_addr; in mes_v12_1_add_hw_queue()
420 mes_add_queue_pkt.wptr_addr = input->wptr_addr; in mes_v12_1_map_legacy_queue()
881 mes_reset_queue_pkt.wptr_addr_lp = input->wptr_addr;
H A Dmes_v12_0.c335 mes_add_queue_pkt.wptr_addr = input->wptr_mc_addr; in mes_v12_0_add_hw_queue()
710 mes_add_queue_pkt.wptr_addr = input->wptr_addr; in mes_v12_0_map_legacy_queue()
1128 mes_reset_queue_pkt.wptr_addr_lp = input->wptr_addr; in mes_v12_0_reset_hw_queue()
H A Dgfx_v9_4_3.c203 uint64_t wptr_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v9_4_3_kiq_map_queues() local
225 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v9_4_3_kiq_map_queues()
226 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v9_4_3_kiq_map_queues()
H A Dgfx_v12_1.c236 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v12_1_kiq_map_queues() local
266 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v12_1_kiq_map_queues()
267 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v12_1_kiq_map_queues()
H A Dgfx_v12_0.c311 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v12_0_kiq_map_queues() local
346 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v12_0_kiq_map_queues()
347 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v12_0_kiq_map_queues()
H A Dgfx_v8_0.c4355 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v8_0_kiq_kcq_enable() local
4369 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v8_0_kiq_kcq_enable()
4370 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v8_0_kiq_kcq_enable()
H A Dgfx_v9_0.c955 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx_v9_0_kiq_map_queues() local
977 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx_v9_0_kiq_map_queues()
978 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx_v9_0_kiq_map_queues()
H A Dgfx_v11_0.c393 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx11_kiq_map_queues() local
428 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx11_kiq_map_queues()
429 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx11_kiq_map_queues()
H A Dgfx_v10_0.c3730 uint64_t wptr_addr = ring->wptr_gpu_addr; in gfx10_kiq_map_queues() local
3762 amdgpu_ring_write(kiq_ring, lower_32_bits(wptr_addr)); in gfx10_kiq_map_queues()
3763 amdgpu_ring_write(kiq_ring, upper_32_bits(wptr_addr)); in gfx10_kiq_map_queues()
/linux/drivers/gpu/drm/amd/include/
H A Dmes_v11_api_def.h293 uint64_t wptr_addr; member