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/linux/drivers/pci/endpoint/
H A Dpci-epc-mem.c48 struct pci_epc_mem_window *windows, in pci_epc_multi_mem_init() argument
62 if (!windows || !num_windows) in pci_epc_multi_mem_init()
65 epc->windows = kzalloc_objs(*epc->windows, num_windows); in pci_epc_multi_mem_init()
66 if (!epc->windows) in pci_epc_multi_mem_init()
70 page_size = windows[i].page_size; in pci_epc_multi_mem_init()
74 pages = windows[i].size >> page_shift; in pci_epc_multi_mem_init()
92 mem->window.phys_base = windows[i].phys_base; in pci_epc_multi_mem_init()
93 mem->window.size = windows[i].size; in pci_epc_multi_mem_init()
98 epc->windows[i] = mem; in pci_epc_multi_mem_init()
101 epc->mem = epc->windows[0]; in pci_epc_multi_mem_init()
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/linux/drivers/mailbox/
H A Darm_mhuv2.c182 unsigned int windows; member
233 u32 windows; member
329 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_rx_startup()
343 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_rx_shutdown()
352 const int windows = priv->windows; in mhuv2_data_transfer_read_data() local
357 msg = kzalloc(sizeof(*msg) + windows * MHUV2_STAT_BYTES, GFP_KERNEL); in mhuv2_data_transfer_read_data()
362 msg->len = windows * MHUV2_STAT_BYTES; in mhuv2_data_transfer_read_data()
376 for (i = 0; i < windows; i++) { in mhuv2_data_transfer_read_data()
378 data[windows - 1 - i] = readl_relaxed(&mhu->recv->ch_wn[idx].stat); in mhuv2_data_transfer_read_data()
389 int i = priv->ch_wn_idx + priv->windows - 1; in mhuv2_data_transfer_tx_startup()
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/linux/drivers/pci/controller/
H A Dpcie-iproc-bcma.c62 pci_add_resource(&bridge->windows, &pcie->mem); in iproc_bcma_pcie_probe()
63 ret = devm_request_pci_bus_resources(dev, &bridge->windows); in iproc_bcma_pcie_probe()
71 return iproc_pcie_setup(pcie, &bridge->windows); in iproc_bcma_pcie_probe()
H A Dpcie-rockchip-ep.c761 struct pci_epc_mem_window *windows = NULL; in rockchip_pcie_ep_init_ob_mem() local
770 windows = devm_kcalloc(dev, ep->max_regions, in rockchip_pcie_ep_init_ob_mem()
772 if (!windows) in rockchip_pcie_ep_init_ob_mem()
776 windows[i].phys_base = rockchip->mem_res->start + (SZ_1M * i); in rockchip_pcie_ep_init_ob_mem()
777 windows[i].size = SZ_1M; in rockchip_pcie_ep_init_ob_mem()
778 windows[i].page_size = SZ_1M; in rockchip_pcie_ep_init_ob_mem()
780 err = pci_epc_multi_mem_init(ep->epc, windows, ep->max_regions); in rockchip_pcie_ep_init_ob_mem()
781 devm_kfree(dev, windows); in rockchip_pcie_ep_init_ob_mem()
/linux/Documentation/admin-guide/media/
H A Dlmedm04.rst12 The Sharp 7395 driver can be found in windows/system32/drivers
57 only found in windows/system32/drivers
69 The Sharp 0194 tuner driver can be found in windows/system32/drivers
90 The m88rs2000 tuner driver can be found in windows/system32/drivers
/linux/Documentation/devicetree/bindings/powerpc/fsl/
H A Decm.txt9 windows are configured. For ECM based devices this is the first 4k
11 number of local access windows as specified by fsl,num-laws.
31 windows for this device.
H A Dmcm.txt9 windows are configured. For MCM based devices this is the first 4k
11 number of local access windows as specified by fsl,num-laws.
31 windows for this device.
H A Dsrio.txt49 Usage: required if local access windows preset
53 setting of the local access windows that are targeted to this
/linux/arch/alpha/kernel/
H A Dsys_nautilus.c212 pci_add_resource(&bridge->windows, &ioport_resource); in nautilus_init_pci()
215 pci_add_resource(&bridge->windows, &irongate_mem); in nautilus_init_pci()
217 pci_add_resource(&bridge->windows, &busn_resource); in nautilus_init_pci()
/linux/Documentation/arch/powerpc/
H A Dpci_iov_resource_on_powernv.rst58 contain two "windows", depending on the value of PCI address bit 59.
63 - For MSIs, we have two windows in the address space (one at the top of
74 Like other PCI host bridges, the Power8 IODA2 PHB supports "windows"
76 window and sixteen M64 windows. They have different characteristics.
101 SR-IOV). We basically use the trick of forcing the bridge MMIO windows
110 - The M64 windows:
123 * Support overlaps. If an address is covered by multiple windows,
155 We would like to investigate using additional M64 windows in "single
201 - Single segmented M64 windows: A segmented M64 window could be used just
207 - Multiple segmented M64 windows: As usual, each window is split into 256
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/linux/Documentation/devicetree/bindings/pci/
H A Dti-pci.txt52 - num-ib-windows : number of inbound address translation windows
53 - num-ob-windows : number of outbound address translation windows
/linux/Documentation/devicetree/bindings/bus/
H A Dmvebu-mbus.txt37 size for the address decoding windows allocated for
106 entries for translation that do not correspond to valid windows (S = 0xf)
198 The mbus-node ranges property defines a set of mbus windows that are expected
203 chooses to use a different set of mbus windows, it must ensure that any address
206 The operating system may insert additional mbus windows that do not conflict
210 is needed to set up the other windows.
/linux/drivers/ntb/hw/idt/
H A DKconfig19 with chosen valid aperture. For memory windows related BARs the
20 aperture settings shall determine the maximum size of memory windows
/linux/arch/um/drivers/
H A Dvirt-pci.c577 pci_add_resource(&bridge->windows, &virt_iomem_resource); in um_pci_init()
578 pci_add_resource(&bridge->windows, &busn_resource); in um_pci_init()
605 pci_free_resource_list(&bridge->windows); in um_pci_init()
615 pci_free_resource_list(&bridge->windows); in um_pci_exit()
/linux/Documentation/gpu/
H A Dtegra.rst86 A display controller controls a set of windows that can be used to composite
88 ordering to individual windows (by programming the corresponding blending
90 assume a fixed Z ordering of the windows (window A is the root window, that
91 is, the lowest, while windows B and C are overlaid on top of window A). The
92 overlay windows support multiple pixel formats and can automatically convert
/linux/rust/pin-init/examples/
H A Dpthread_mutex.rs7 #[cfg(not(windows))]
144 #[cfg(all(any(feature = "std", feature = "alloc"), not(windows)))] in main()
/linux/Documentation/sound/cards/
H A Dmaya44.rst125 …lease refer to the block diagram on p.24 of the ESI Maya44 manual, or in the ESI windows software).
143 … analogue bypass from ADC input to output for channel 1+2. Same as "Monitor" in the windows driver.
155 This is not supported by the ESI windows driver.
162 They are not supported by the ESI windows driver.
/linux/arch/sparc/kernel/
H A Dleon_pci.c43 list_splice_init(&resources, &bridge->windows); in leon_pci_init()
/linux/arch/mips/pci/
H A Dpci-xtalk-bridge.c653 pci_add_resource_offset(&host->windows, &bd->mem, bd->mem_offset); in bridge_probe()
654 pci_add_resource_offset(&host->windows, &bd->io, bd->io_offset); in bridge_probe()
655 pci_add_resource(&host->windows, &bc->busn); in bridge_probe()
657 err = devm_request_pci_bus_resources(dev, &host->windows); in bridge_probe()
729 pci_free_resource_list(&host->windows); in bridge_probe()
/linux/arch/arm/mach-lpc32xx/
H A Dsuspend.S51 @ This guarantees a small windows where DRAM isn't busy
/linux/Documentation/wmi/devices/
H A Dlenovo-wmi-gamezone.rst87 …ption("EC support disable windows key capability")] void IsSupportDisableWinKey ([out, Description…
88 …(22), Implemented, Description("Set windows key disable/enable")] void SetWinKeyStatus ([in, Descr…
89 …, Implemented, Description("Get windows key disable/enable status")] void GetWinKeyStatus ([out, D…
/linux/Documentation/nvme/
H A Dnvme-pci-endpoint-target.rst92 Most PCI endpoint controllers provide a limited number of mapping windows for
94 endpoint target controllers uses mapping windows for the following.
101 operation, the memory windows as described above will generally not be used
104 windows of the PCI endpoint controller minus two. E.g. for an endpoint PCI
105 controller with 32 outbound memory windows available, up to 30 completion
107 errors due to the lack of memory windows.
122 PCI mapping windows minus 2 (see above).
/linux/drivers/pci/controller/mobiveil/
H A DKconfig32 Soft IP. It has up to 8 outbound and inbound windows
/linux/Documentation/PCI/endpoint/function/binding/
H A Dpci-ntb.rst36 num_mws Number of memory windows; max = 4
/linux/tools/testing/nvdimm/test/
H A Dnfit.c2352 dcr->windows = 1; in nfit_test0_setup()
2368 dcr->windows = 1; in nfit_test0_setup()
2384 dcr->windows = 1; in nfit_test0_setup()
2400 dcr->windows = 1; in nfit_test0_setup()
2417 dcr->windows = 0; in nfit_test0_setup()
2429 dcr->windows = 0; in nfit_test0_setup()
2441 dcr->windows = 0; in nfit_test0_setup()
2453 dcr->windows = 0; in nfit_test0_setup()
2461 bdw->windows = 1; in nfit_test0_setup()
2473 bdw->windows = 1; in nfit_test0_setup()
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