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Searched refs:wb_gpu_addr (Results 1 – 15 of 15) sorted by relevance

/linux/drivers/gpu/drm/amd/amdgpu/
H A Dmes_v12_0.c1013 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v12_0_mqd_init() local
1056 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v12_0_mqd_init()
1057 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v12_0_mqd_init()
1059 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
1062 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v12_0_mqd_init()
1063 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v12_0_mqd_init()
1064 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v12_0_mqd_init()
H A Dsdma_v7_0.c859 uint64_t wb_gpu_addr; in sdma_v7_0_mqd_init() local
870 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v7_0_mqd_init()
871 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
872 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
874 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v7_0_mqd_init()
875 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
876 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v7_0_mqd_init()
H A Dmes_v11_0.c1084 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in mes_v11_0_mqd_init() local
1129 wb_gpu_addr = ring->rptr_gpu_addr; in mes_v11_0_mqd_init()
1130 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in mes_v11_0_mqd_init()
1132 upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
1135 wb_gpu_addr = ring->wptr_gpu_addr; in mes_v11_0_mqd_init()
1136 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffff8; in mes_v11_0_mqd_init()
1137 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in mes_v11_0_mqd_init()
H A Dsdma_v6_0.c859 uint64_t wb_gpu_addr; in sdma_v6_0_mqd_init() local
870 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v6_0_mqd_init()
871 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
872 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
874 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v6_0_mqd_init()
875 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
876 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v6_0_mqd_init()
H A Dsdma_v5_2.c850 uint64_t wb_gpu_addr; in sdma_v5_2_mqd_init() local
864 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_2_mqd_init()
865 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
866 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
868 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_2_mqd_init()
869 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
870 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_2_mqd_init()
H A Dsdma_v5_0.c993 uint64_t wb_gpu_addr; in sdma_v5_0_mqd_init() local
1007 wb_gpu_addr = prop->wptr_gpu_addr; in sdma_v5_0_mqd_init()
1008 m->sdmax_rlcx_rb_wptr_poll_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1009 m->sdmax_rlcx_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1011 wb_gpu_addr = prop->rptr_gpu_addr; in sdma_v5_0_mqd_init()
1012 m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
1013 m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits(wb_gpu_addr); in sdma_v5_0_mqd_init()
H A Dgfx_v12_0.c2859 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v12_0_gfx_mqd_init() local
2900 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
2901 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
2903 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
2906 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v12_0_gfx_mqd_init()
2907 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_gfx_mqd_init()
2908 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v12_0_gfx_mqd_init()
3012 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v12_0_compute_mqd_init() local
3086 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v12_0_compute_mqd_init()
3087 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v12_0_compute_mqd_init()
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H A Dgfx_v11_0.c3963 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v11_0_gfx_mqd_init() local
4001 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4002 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4004 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4007 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v11_0_gfx_mqd_init()
4008 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_gfx_mqd_init()
4009 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v11_0_gfx_mqd_init()
4104 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v11_0_compute_mqd_init() local
4179 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v11_0_compute_mqd_init()
4180 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v11_0_compute_mqd_init()
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H A Dgfx_v7_0.c2820 u64 wb_gpu_addr; in gfx_v7_0_mqd_init() local
2875 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v7_0_mqd_init()
2876 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2877 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
2880 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v7_0_mqd_init()
2881 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v7_0_mqd_init()
2883 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v7_0_mqd_init()
H A Dgfx_v9_4_2.c351 u32 compute_dim_x, u64 wb_gpu_addr, u32 pattern, in gfx_v9_4_2_run_shader() argument
399 ib->ptr[ib->length_dw++] = lower_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
400 ib->ptr[ib->length_dw++] = upper_32_bits(wb_gpu_addr); in gfx_v9_4_2_run_shader()
H A Dgfx_v9_4_3.c1810 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_4_3_xcc_mqd_init() local
1898 wb_gpu_addr = adev->wb.gpu_addr + (ring->rptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1899 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1901 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
1904 wb_gpu_addr = adev->wb.gpu_addr + (ring->wptr_offs * 4); in gfx_v9_4_3_xcc_mqd_init()
1905 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_4_3_xcc_mqd_init()
1906 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_4_3_xcc_mqd_init()
H A Dgfx_v10_0.c6639 uint64_t hqd_gpu_addr, wb_gpu_addr; in gfx_v10_0_gfx_mqd_init() local
6677 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6678 mqd->cp_gfx_hqd_rptr_addr = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6680 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6683 wb_gpu_addr = prop->wptr_gpu_addr; in gfx_v10_0_gfx_mqd_init()
6684 mqd->cp_rb_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_gfx_mqd_init()
6685 mqd->cp_rb_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v10_0_gfx_mqd_init()
6796 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v10_0_compute_mqd_init() local
6874 wb_gpu_addr = prop->rptr_gpu_addr; in gfx_v10_0_compute_mqd_init()
6875 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v10_0_compute_mqd_init()
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H A Dgfx_v8_0.c4411 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v8_0_mqd_init() local
4474 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v8_0_mqd_init()
4475 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4477 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
4480 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v8_0_mqd_init()
4481 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v8_0_mqd_init()
4482 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v8_0_mqd_init()
H A Dgfx_v9_0.c3513 uint64_t hqd_gpu_addr, wb_gpu_addr, eop_base_addr; in gfx_v9_0_mqd_init() local
3602 wb_gpu_addr = ring->rptr_gpu_addr; in gfx_v9_0_mqd_init()
3603 mqd->cp_hqd_pq_rptr_report_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3605 upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
3608 wb_gpu_addr = ring->wptr_gpu_addr; in gfx_v9_0_mqd_init()
3609 mqd->cp_hqd_pq_wptr_poll_addr_lo = wb_gpu_addr & 0xfffffffc; in gfx_v9_0_mqd_init()
3610 mqd->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in gfx_v9_0_mqd_init()
/linux/drivers/gpu/drm/radeon/
H A Dcik.c4516 u64 wb_gpu_addr; in cik_cp_compute_resume() local
4677 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP1_WPTR_OFFSET; in cik_cp_compute_resume()
4679 wb_gpu_addr = rdev->wb.gpu_addr + CIK_WB_CP2_WPTR_OFFSET; in cik_cp_compute_resume()
4680 mqd->queue_state.cp_hqd_pq_wptr_poll_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4681 mqd->queue_state.cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()
4688 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP1_RPTR_OFFSET; in cik_cp_compute_resume()
4690 wb_gpu_addr = rdev->wb.gpu_addr + RADEON_WB_CP2_RPTR_OFFSET; in cik_cp_compute_resume()
4691 mqd->queue_state.cp_hqd_pq_rptr_report_addr = wb_gpu_addr & 0xfffffffc; in cik_cp_compute_resume()
4693 upper_32_bits(wb_gpu_addr) & 0xffff; in cik_cp_compute_resume()