Searched refs:wait_reg_mem (Results 1 – 5 of 5) sorted by relevance
506 misc_pkt.wait_reg_mem.op = WRM_OPERATION__WAIT_REG_MEM; in mes_v12_0_misc_op()507 misc_pkt.wait_reg_mem.reference = input->wrm_reg.ref; in mes_v12_0_misc_op()508 misc_pkt.wait_reg_mem.mask = input->wrm_reg.mask; in mes_v12_0_misc_op()509 misc_pkt.wait_reg_mem.reg_offset1 = input->wrm_reg.reg0; in mes_v12_0_misc_op()510 misc_pkt.wait_reg_mem.reg_offset2 = 0; in mes_v12_0_misc_op()514 misc_pkt.wait_reg_mem.op = WRM_OPERATION__WR_WAIT_WR_REG; in mes_v12_0_misc_op()515 misc_pkt.wait_reg_mem.reference = input->wrm_reg.ref; in mes_v12_0_misc_op()516 misc_pkt.wait_reg_mem.mask = input->wrm_reg.mask; in mes_v12_0_misc_op()517 misc_pkt.wait_reg_mem.reg_offset1 = input->wrm_reg.reg0; in mes_v12_0_misc_op()518 misc_pkt.wait_reg_mem.reg_offset2 = input->wrm_reg.reg1; in mes_v12_0_misc_op()
595 misc_pkt.wait_reg_mem.op = WRM_OPERATION__WAIT_REG_MEM; in mes_v11_0_misc_op()596 misc_pkt.wait_reg_mem.reference = input->wrm_reg.ref; in mes_v11_0_misc_op()597 misc_pkt.wait_reg_mem.mask = input->wrm_reg.mask; in mes_v11_0_misc_op()598 misc_pkt.wait_reg_mem.reg_offset1 = input->wrm_reg.reg0; in mes_v11_0_misc_op()599 misc_pkt.wait_reg_mem.reg_offset2 = 0; in mes_v11_0_misc_op()603 misc_pkt.wait_reg_mem.op = WRM_OPERATION__WR_WAIT_WR_REG; in mes_v11_0_misc_op()604 misc_pkt.wait_reg_mem.reference = input->wrm_reg.ref; in mes_v11_0_misc_op()605 misc_pkt.wait_reg_mem.mask = input->wrm_reg.mask; in mes_v11_0_misc_op()606 misc_pkt.wait_reg_mem.reg_offset1 = input->wrm_reg.reg0; in mes_v11_0_misc_op()607 misc_pkt.wait_reg_mem.reg_offset2 = input->wrm_reg.reg1; in mes_v11_0_misc_op()
828 struct radeon_cs_packet p3reloc, wait_reg_mem; in r600_cs_common_vline_parse() local837 r = radeon_cs_packet_parse(p, &wait_reg_mem, p->idx); in r600_cs_common_vline_parse()842 if (wait_reg_mem.type != RADEON_PACKET_TYPE3 || in r600_cs_common_vline_parse()843 wait_reg_mem.opcode != PACKET3_WAIT_REG_MEM) { in r600_cs_common_vline_parse()848 wait_reg_mem_info = radeon_get_ib_value(p, wait_reg_mem.idx + 1); in r600_cs_common_vline_parse()864 if ((radeon_get_ib_value(p, wait_reg_mem.idx + 2) << 2) != vline_status[0]) { in r600_cs_common_vline_parse()869 if (radeon_get_ib_value(p, wait_reg_mem.idx + 5) != RADEON_VLINE_STAT) { in r600_cs_common_vline_parse()875 r = radeon_cs_packet_parse(p, &p3reloc, p->idx + wait_reg_mem.count + 2); in r600_cs_common_vline_parse()880 p->idx += wait_reg_mem.count + 2; in r600_cs_common_vline_parse()
631 struct WAIT_REG_MEM wait_reg_mem; member
726 struct WAIT_REG_MEM wait_reg_mem; member