| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.h | 260 int vready_offset,
|
| /linux/drivers/gpu/drm/amd/display/dc/dce60/ |
| H A D | dce60_timing_generator.c | 110 int vready_offset, in program_timing() argument
|
| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn401/ |
| H A D | dcn401_hwseq.c | 2187 unsigned int vready_offset = pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_program_pipe_sequence()
2189 /* Always use the largest vready_offset of all connected pipes */ in dcn401_program_pipe_sequence()
2191 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_program_pipe_sequence()
2192 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_program_pipe_sequence()
2195 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_program_pipe_sequence()
2196 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_program_pipe_sequence()
2199 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_program_pipe_sequence()
2200 vready_offset = other_pipe->global_sync.dcn4x.vready_offset_pixels; in dcn401_program_pipe_sequence()
2203 if (other_pipe->global_sync.dcn4x.vready_offset_pixels > vready_offset) in dcn401_program_pipe_sequence()
2204 vready_offset in dcn401_program_pipe_sequence()
2011 unsigned int vready_offset = pipe->global_sync.dcn4x.vready_offset_pixels; dcn401_calculate_vready_offset_for_group() local
[all...] |
| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_structs.h | 525 unsigned int vready_offset; member
|
| H A D | display_mode_vba.h | 141 dml_get_pipe_attr_decl(vready_offset);
|
| H A D | display_mode_vba.c | 181 dml_get_pipe_attr_func(vready_offset, mode_lib->vba.VReadyOffsetPix);
|
| /linux/drivers/gpu/drm/amd/display/dc/core/ |
| H A D | dc_hw_sequencer.c | 2024 int vready_offset, in hwss_set_ocsc_default()
2032 seq_state->steps[*seq_state->num_steps].params.tg_program_global_sync_params.vready_offset = vready_offset; in hwss_subvp_save_surf_addr()
2752 int vready_offset = params->tg_program_global_sync_params.vready_offset; in hwss_dwbc_update()
2759 tg->funcs->program_global_sync(tg, vready_offset, vstartup_lines, in hwss_hubp_update_mall_sel()
1685 hwss_add_tg_program_global_sync(struct block_sequence_state * seq_state,struct timing_generator * tg,int vready_offset,unsigned int vstartup_lines,unsigned int vupdate_offset_pixels,unsigned int vupdate_vupdate_width_pixels,unsigned int pstate_keepout_start_lines) hwss_add_tg_program_global_sync() argument
2388 int vready_offset = params->tg_program_global_sync_params.vready_offset; hwss_tg_program_global_sync() local
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/ |
| H A D | dml2_utils.c | 258 pipe_ctx->pipe_dlg_param.vready_offset = dml_get_vready_offset(mode_lib, pipe_idx); in populate_pipe_ctx_dlg_params_from_dml()
|
| H A D | display_mode_core.c | 10435 dml_get_per_surface_var_func(vready_offset, dml_uint_t, mode_lib->mp.VReadyOffsetPix);
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn32/ |
| H A D | dcn32_fpu.c | 358 pipes[pipe_idx].pipe.dest.vready_offset = in dcn32_helper_populate_phantom_dlg_params()
1686 pipes[pipe_idx].pipe.dest.vready_offset = (unsigned int)get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, in dcn32_calculate_dlg_params()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1191 pipes[pipe_idx].pipe.dest.vready_offset = (unsigned int)get_vready_offset(&context->bw_ctx.dml, pipes, pipe_cnt, pipe_idx); in dcn20_calculate_dlg_params()
|
| /linux/drivers/gpu/drm/amd/display/dc/dml2_0/dml21/src/dml2_core/ |
| H A D | dml2_core_dcn4_calcs.c | 272 dml_get_per_pipe_var_func(vready_offset, unsigned int, mode_lib->mp.VReadyOffsetPix);
|