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Searched refs:vmx_set_intercept_for_msr (Results 1 – 2 of 2) sorted by relevance

/linux/arch/x86/kvm/vmx/
H A Dvmx.h381 void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set);
386 vmx_set_intercept_for_msr(vcpu, msr, type, false); in vmx_disable_intercept_for_msr()
392 vmx_set_intercept_for_msr(vcpu, msr, type, true); in vmx_enable_intercept_for_msr()
H A Dvmx.c4128 void vmx_set_intercept_for_msr(struct kvm_vcpu *vcpu, u32 msr, int type, bool set) in vmx_set_intercept_for_msr() function
4201 vmx_set_intercept_for_msr(vcpu, X2APIC_MSR(APIC_TASKPRI), MSR_TYPE_RW, in vmx_update_msr_bitmap_x2apic()
4218 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_STATUS, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4219 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_BASE, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4220 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_OUTPUT_MASK, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4221 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_CR3_MATCH, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4223 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_A + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4224 vmx_set_intercept_for_msr(vcpu, MSR_IA32_RTIT_ADDR0_B + i * 2, MSR_TYPE_RW, flag); in pt_update_intercept_for_msr()
4256 vmx_set_intercept_for_msr(vcpu, MSR_IA32_PERFCTR0 + i, in vmx_recalc_pmu_msr_intercepts()
4258 vmx_set_intercept_for_msr(vcpu, MSR_IA32_PMC0 + i, MSR_TYPE_RW, in vmx_recalc_pmu_msr_intercepts()
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