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Searched refs:vmcr (Results 1 – 7 of 7) sorted by relevance

/linux/arch/arm64/kvm/
H A Dvgic-sys-reg-v3.c18 struct vgic_vmcr vmcr; in set_gic_ctlr() local
20 vgic_get_vmcr(vcpu, &vmcr); in set_gic_ctlr()
52 vmcr.cbpr = FIELD_GET(ICC_CTLR_EL1_CBPR_MASK, val); in set_gic_ctlr()
53 vmcr.eoim = FIELD_GET(ICC_CTLR_EL1_EOImode_MASK, val); in set_gic_ctlr()
54 vgic_set_vmcr(vcpu, &vmcr); in set_gic_ctlr()
63 struct vgic_vmcr vmcr; in get_gic_ctlr() local
66 vgic_get_vmcr(vcpu, &vmcr); in get_gic_ctlr()
79 val |= FIELD_PREP(ICC_CTLR_EL1_CBPR_MASK, vmcr.cbpr); in get_gic_ctlr()
80 val |= FIELD_PREP(ICC_CTLR_EL1_EOImode_MASK, vmcr.eoim); in get_gic_ctlr()
90 struct vgic_vmcr vmcr; in set_gic_pmr() local
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/linux/arch/arm64/kvm/vgic/
H A Dvgic-mmio-v2.c278 struct vgic_vmcr vmcr; in vgic_mmio_read_vcpuif() local
281 vgic_get_vmcr(vcpu, &vmcr); in vgic_mmio_read_vcpuif()
285 val = vmcr.grpen0 << GIC_CPU_CTRL_EnableGrp0_SHIFT; in vgic_mmio_read_vcpuif()
286 val |= vmcr.grpen1 << GIC_CPU_CTRL_EnableGrp1_SHIFT; in vgic_mmio_read_vcpuif()
287 val |= vmcr.ackctl << GIC_CPU_CTRL_AckCtl_SHIFT; in vgic_mmio_read_vcpuif()
288 val |= vmcr.fiqen << GIC_CPU_CTRL_FIQEn_SHIFT; in vgic_mmio_read_vcpuif()
289 val |= vmcr.cbpr << GIC_CPU_CTRL_CBPR_SHIFT; in vgic_mmio_read_vcpuif()
290 val |= vmcr.eoim << GIC_CPU_CTRL_EOImodeNS_SHIFT; in vgic_mmio_read_vcpuif()
301 val = (vmcr.pmr & GICV_PMR_PRIORITY_MASK) >> in vgic_mmio_read_vcpuif()
305 val = vmcr.bpr; in vgic_mmio_read_vcpuif()
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H A Dvgic-v2.c342 u32 vmcr; in vgic_v2_set_vmcr() local
344 vmcr = (vmcrp->grpen0 << GICH_VMCR_ENABLE_GRP0_SHIFT) & in vgic_v2_set_vmcr()
346 vmcr |= (vmcrp->grpen1 << GICH_VMCR_ENABLE_GRP1_SHIFT) & in vgic_v2_set_vmcr()
348 vmcr |= (vmcrp->ackctl << GICH_VMCR_ACK_CTL_SHIFT) & in vgic_v2_set_vmcr()
350 vmcr |= (vmcrp->fiqen << GICH_VMCR_FIQ_EN_SHIFT) & in vgic_v2_set_vmcr()
352 vmcr |= (vmcrp->cbpr << GICH_VMCR_CBPR_SHIFT) & in vgic_v2_set_vmcr()
354 vmcr |= (vmcrp->eoim << GICH_VMCR_EOI_MODE_SHIFT) & in vgic_v2_set_vmcr()
356 vmcr |= (vmcrp->abpr << GICH_VMCR_ALIAS_BINPOINT_SHIFT) & in vgic_v2_set_vmcr()
358 vmcr |= (vmcrp->bpr << GICH_VMCR_BINPOINT_SHIFT) & in vgic_v2_set_vmcr()
360 vmcr |= ((vmcrp->pmr >> GICV_PMR_PRIORITY_SHIFT) << in vgic_v2_set_vmcr()
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H A Dvgic-v3.c408 u32 vmcr; in vgic_v3_set_vmcr() local
411 vmcr = FIELD_PREP(ICH_VMCR_EL2_VAckCtl, vmcrp->ackctl); in vgic_v3_set_vmcr()
412 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VFIQEn, vmcrp->fiqen); in vgic_v3_set_vmcr()
418 vmcr = ICH_VMCR_EL2_VFIQEn_MASK; in vgic_v3_set_vmcr()
421 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VCBPR, vmcrp->cbpr); in vgic_v3_set_vmcr()
422 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VEOIM, vmcrp->eoim); in vgic_v3_set_vmcr()
423 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VBPR1, vmcrp->abpr); in vgic_v3_set_vmcr()
424 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VBPR0, vmcrp->bpr); in vgic_v3_set_vmcr()
425 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VPMR, vmcrp->pmr); in vgic_v3_set_vmcr()
426 vmcr |= FIELD_PREP(ICH_VMCR_EL2_VENG0, vmcrp->grpen0); in vgic_v3_set_vmcr()
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H A Dvgic.c277 struct vgic_vmcr vmcr; member
319 ret = (int)(irqb->group ? info->vmcr.grpen1 : info->vmcr.grpen0); in vgic_irq_cmp()
320 ret -= (int)(irqa->group ? info->vmcr.grpen1 : info->vmcr.grpen0); in vgic_irq_cmp()
353 vgic_get_vmcr(vcpu, &info.vmcr); in vgic_sort_ap_list()
1129 struct vgic_vmcr vmcr; in kvm_vgic_vcpu_pending_irq() local
1137 vgic_get_vmcr(vcpu, &vmcr); in kvm_vgic_vcpu_pending_irq()
1145 irq->priority < vmcr.pmr; in kvm_vgic_vcpu_pending_irq()
H A Dvgic-mmio.c843 void vgic_set_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) in vgic_set_vmcr() argument
846 vgic_v2_set_vmcr(vcpu, vmcr); in vgic_set_vmcr()
848 vgic_v3_set_vmcr(vcpu, vmcr); in vgic_set_vmcr()
851 void vgic_get_vmcr(struct kvm_vcpu *vcpu, struct vgic_vmcr *vmcr) in vgic_get_vmcr() argument
854 vgic_v2_get_vmcr(vcpu, vmcr); in vgic_get_vmcr()
856 vgic_v3_get_vmcr(vcpu, vmcr); in vgic_get_vmcr()
/linux/drivers/video/fbdev/
H A Dcg14.c125 u32 vmcr; /* VBC Master Control */ member