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Searched refs:vm_manager (Results 1 – 25 of 58) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_ids.c203 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab_idle()
220 struct amdgpu_ring *r = adev->vm_manager.concurrent_flush ? in amdgpu_vmid_grab_idle()
231 u64 fence_context = adev->vm_manager.fence_context + ring->idx; in amdgpu_vmid_grab_idle()
232 unsigned seqno = ++adev->vm_manager.seqno[ring->idx]; in amdgpu_vmid_grab_idle()
278 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab_reserved()
311 if (adev->vm_manager.concurrent_flush) in amdgpu_vmid_grab_reserved()
355 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab_used()
381 if (needs_flush && !adev->vm_manager.concurrent_flush) in amdgpu_vmid_grab_used()
415 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab()
495 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_alloc_reserved()
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H A Damdgpu_vm.c149 r = xa_err(xa_erase_irq(&adev->vm_manager.pasids, vm->pasid)); in amdgpu_vm_set_pasid()
157 r = xa_err(xa_store_irq(&adev->vm_manager.pasids, pasid, vm, in amdgpu_vm_set_pasid()
400 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
401 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
406 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
407 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
613 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_need_pipeline_sync()
647 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_flush()
1218 vram_base = bo_adev->vm_manager.vram_base_offset; in amdgpu_vm_bo_update()
1303 spin_lock_irqsave(&adev->vm_manager.prt_lock, flags); in amdgpu_vm_update_prt_state()
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H A Damdgpu_vm_pt.c57 adev->vm_manager.block_size; in amdgpu_vm_pt_level_shift()
79 shift = amdgpu_vm_pt_level_shift(adev, adev->vm_manager.root_level); in amdgpu_vm_pt_num_entries()
80 if (level == adev->vm_manager.root_level) in amdgpu_vm_pt_num_entries()
82 return round_up(adev->vm_manager.max_pfn, 1ULL << shift) in amdgpu_vm_pt_num_entries()
104 if (level <= adev->vm_manager.root_level) in amdgpu_vm_pt_entries_mask()
163 cursor->level = adev->vm_manager.root_level; in amdgpu_vm_pt_start()
362 unsigned int level = adev->vm_manager.root_level; in amdgpu_vm_pt_clear()
667 level += params->adev->vm_manager.root_level; in amdgpu_vm_pde_update()
784 max_frag = params->adev->vm_manager.fragment_size; in amdgpu_vm_pte_fragment()
H A Damdgpu_vm.h54 #define AMDGPU_VM_PTE_COUNT(adev) (1 << (adev)->vm_manager.block_size)
168 #define AMDGPU_VA_RESERVED_CSA_START(adev) (((adev)->vm_manager.max_pfn \
475 #define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib…
476 #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->wri…
477 #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_fu…
H A Dgfxhub_v12_0.c175 + adev->vm_manager.vram_base_offset; in gfxhub_v12_0_init_system_aperture_regs()
308 adev->vm_manager.num_level); in gfxhub_v12_0_setup_vmid_config()
325 adev->vm_manager.block_size - 9); in gfxhub_v12_0_setup_vmid_config()
338 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v12_0_setup_vmid_config()
341 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v12_0_setup_vmid_config()
H A Dmmhub_v4_1_0.c193 adev->vm_manager.vram_base_offset; in mmhub_v4_1_0_init_system_aperture_regs()
330 adev->vm_manager.num_level); in mmhub_v4_1_0_setup_vmid_config()
348 adev->vm_manager.block_size - 9); in mmhub_v4_1_0_setup_vmid_config()
361 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_1_0_setup_vmid_config()
364 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_1_0_setup_vmid_config()
H A Dgfxhub_v3_0_3.c305 adev->vm_manager.num_level); in gfxhub_v3_0_3_setup_vmid_config()
322 adev->vm_manager.block_size - 9); in gfxhub_v3_0_3_setup_vmid_config()
335 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()
338 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()
H A Dgfxhub_v2_0.c293 adev->vm_manager.num_level); in gfxhub_v2_0_setup_vmid_config()
310 adev->vm_manager.block_size - 9); in gfxhub_v2_0_setup_vmid_config()
323 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()
326 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()
H A Dgfxhub_v1_0.c257 num_level = adev->vm_manager.num_level; in gfxhub_v1_0_setup_vmid_config()
258 block_size = adev->vm_manager.block_size; in gfxhub_v1_0_setup_vmid_config()
303 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_0_setup_vmid_config()
306 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_0_setup_vmid_config()
H A Dgfxhub_v11_5_0.c303 adev->vm_manager.num_level); in gfxhub_v11_5_0_setup_vmid_config()
320 adev->vm_manager.block_size - 9); in gfxhub_v11_5_0_setup_vmid_config()
333 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v11_5_0_setup_vmid_config()
336 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v11_5_0_setup_vmid_config()
H A Dmmhub_v3_0_2.c321 adev->vm_manager.num_level); in mmhub_v3_0_2_setup_vmid_config()
339 adev->vm_manager.block_size - 9); in mmhub_v3_0_2_setup_vmid_config()
352 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()
355 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()
H A Dgfxhub_v3_0.c300 adev->vm_manager.num_level); in gfxhub_v3_0_setup_vmid_config()
317 adev->vm_manager.block_size - 9); in gfxhub_v3_0_setup_vmid_config()
330 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()
333 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()
H A Dmmhub_v3_0_1.c316 adev->vm_manager.num_level); in mmhub_v3_0_1_setup_vmid_config()
334 adev->vm_manager.block_size - 9); in mmhub_v3_0_1_setup_vmid_config()
347 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()
350 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()
H A Dmmhub_v3_0.c329 adev->vm_manager.num_level); in mmhub_v3_0_setup_vmid_config()
347 adev->vm_manager.block_size - 9); in mmhub_v3_0_setup_vmid_config()
360 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()
363 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()
H A Dmmhub_v2_3.c291 adev->vm_manager.num_level); in mmhub_v2_3_setup_vmid_config()
309 adev->vm_manager.block_size - 9); in mmhub_v2_3_setup_vmid_config()
322 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()
325 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()
H A Dmmhub_v2_0.c373 adev->vm_manager.num_level); in mmhub_v2_0_setup_vmid_config()
391 adev->vm_manager.block_size - 9); in mmhub_v2_0_setup_vmid_config()
404 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()
407 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()
H A Dmmhub_v3_3.c313 adev->vm_manager.num_level); in mmhub_v3_3_setup_vmid_config()
331 adev->vm_manager.block_size - 9); in mmhub_v3_3_setup_vmid_config()
344 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_3_setup_vmid_config()
347 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_3_setup_vmid_config()
H A Dgfxhub_v1_2.c324 num_level = adev->vm_manager.num_level; in gfxhub_v1_2_xcc_setup_vmid_config()
325 block_size = adev->vm_manager.block_size; in gfxhub_v1_2_xcc_setup_vmid_config()
383 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_2_xcc_setup_vmid_config()
387 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v1_2_xcc_setup_vmid_config()
H A Dmmhub_v1_8.c336 num_level = adev->vm_manager.num_level; in mmhub_v1_8_setup_vmid_config()
337 block_size = adev->vm_manager.block_size; in mmhub_v1_8_setup_vmid_config()
387 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_8_setup_vmid_config()
391 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_8_setup_vmid_config()
H A Dgmc_v12_0.c481 *addr = adev->vm_manager.vram_base_offset + *addr - in gmc_v12_0_get_vm_pde()
661 adev->vm_manager.vram_base_offset = 0; in gmc_v12_0_vram_gtt_location()
663 adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev); in gmc_v12_0_vram_gtt_location()
828 adev->vm_manager.first_kfd_vmid = 8; in gmc_v12_0_sw_init()
H A Dgfxhub_v2_1.c305 adev->vm_manager.num_level); in gfxhub_v2_1_setup_vmid_config()
322 adev->vm_manager.block_size - 9); in gfxhub_v2_1_setup_vmid_config()
335 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_1_setup_vmid_config()
338 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_1_setup_vmid_config()
H A Dgmc_v9_0.c1719 adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev); in gmc_v9_0_vram_gtt_location()
1722 adev->vm_manager.vram_base_offset += in gmc_v9_0_vram_gtt_location()
2125 adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
2144 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
2153 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
2164 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
2249 adev->vm_manager.first_kfd_vmid = in gmc_v9_0_sw_init()
H A Damdgpu_amdkfd.c179 ((1 << adev->vm_manager.first_kfd_vmid) - 1), in amdgpu_amdkfd_device_init()
182 .gpuvm_size = min(adev->vm_manager.max_pfn in amdgpu_amdkfd_device_init()
737 return vmid >= adev->vm_manager.first_kfd_vmid; in amdgpu_amdkfd_is_kfd_vmid()
H A Dgmc_v11_0.c661 adev->vm_manager.vram_base_offset = 0; in gmc_v11_0_vram_gtt_location()
663 adev->vm_manager.vram_base_offset = adev->mmhub.funcs->get_mc_fb_offset(adev); in gmc_v11_0_vram_gtt_location()
832 adev->vm_manager.first_kfd_vmid = 8; in gmc_v11_0_sw_init()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_vm.c62 return rdev->vm_manager.max_pfn >> radeon_vm_block_size; in radeon_vm_num_pdes()
89 if (!rdev->vm_manager.enabled) { in radeon_vm_manager_init()
94 rdev->vm_manager.enabled = true; in radeon_vm_manager_init()
110 if (!rdev->vm_manager.enabled) in radeon_vm_manager_fini()
114 radeon_fence_unref(&rdev->vm_manager.active[i]); in radeon_vm_manager_fini()
116 rdev->vm_manager.enabled = false; in radeon_vm_manager_fini()
189 vm_id->last_id_use == rdev->vm_manager.active[vm_id->id]) in radeon_vm_grab_id()
196 for (i = 1; i < rdev->vm_manager.nvm; ++i) { in radeon_vm_grab_id()
197 struct radeon_fence *fence = rdev->vm_manager.active[i]; in radeon_vm_grab_id()
216 return rdev->vm_manager.active[choices[i]]; in radeon_vm_grab_id()
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