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Searched refs:vm_manager (Results 1 – 25 of 38) sorted by relevance

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/linux/drivers/gpu/drm/amd/amdgpu/
H A Damdgpu_vm.c545 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
546 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
551 adev->vm_manager.vm_pte_scheds, in amdgpu_vm_init_entities()
552 adev->vm_manager.vm_pte_num_scheds, NULL); in amdgpu_vm_init_entities()
756 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_need_pipeline_sync()
788 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vm_flush()
1350 vram_base = bo_adev->vm_manager.vram_base_offset; in amdgpu_vm_bo_update()
1436 spin_lock_irqsave(&adev->vm_manager.prt_lock, flags); in amdgpu_vm_update_prt_state()
1437 enable = !!atomic_read(&adev->vm_manager.num_prt_users); in amdgpu_vm_update_prt_state()
1439 spin_unlock_irqrestore(&adev->vm_manager.prt_lock, flags); in amdgpu_vm_update_prt_state()
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H A Damdgpu_ids.c214 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab_idle()
225 struct amdgpu_ring *r = adev->vm_manager.concurrent_flush ? in amdgpu_vmid_grab_idle()
280 (!adev->vm_manager.concurrent_flush && needs_flush)) { in amdgpu_vmid_grab_reserved()
286 if (adev->vm_manager.concurrent_flush) in amdgpu_vmid_grab_reserved()
329 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab_used()
355 if (needs_flush && !adev->vm_manager.concurrent_flush) in amdgpu_vmid_grab_used()
390 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_grab()
476 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_alloc_reserved()
509 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_free_reserved()
533 struct amdgpu_vmid_mgr *id_mgr = &adev->vm_manager.id_mgr[vmhub]; in amdgpu_vmid_reset()
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H A Damdgpu_vm_pt.c59 adev->vm_manager.block_size; in amdgpu_vm_pt_level_shift()
81 shift = amdgpu_vm_pt_level_shift(adev, adev->vm_manager.root_level); in amdgpu_vm_pt_num_entries()
82 if (level == adev->vm_manager.root_level) in amdgpu_vm_pt_num_entries()
84 return round_up(adev->vm_manager.max_pfn, 1ULL << shift) in amdgpu_vm_pt_num_entries()
106 if (level <= adev->vm_manager.root_level) in amdgpu_vm_pt_entries_mask()
165 cursor->level = adev->vm_manager.root_level; in amdgpu_vm_pt_start()
364 unsigned int level = adev->vm_manager.root_level; in amdgpu_vm_pt_clear()
646 level += params->adev->vm_manager.root_level; in amdgpu_vm_pde_update()
766 max_frag = params->adev->vm_manager.fragment_size; in amdgpu_vm_pte_fragment()
H A Dgfxhub_v12_0.c175 + adev->vm_manager.vram_base_offset; in gfxhub_v12_0_init_system_aperture_regs()
308 adev->vm_manager.num_level); in gfxhub_v12_0_setup_vmid_config()
325 adev->vm_manager.block_size - 9); in gfxhub_v12_0_setup_vmid_config()
338 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v12_0_setup_vmid_config()
341 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v12_0_setup_vmid_config()
H A Damdgpu_vm.h55 #define AMDGPU_VM_PTE_COUNT(adev) (1 << (adev)->vm_manager.block_size)
170 #define AMDGPU_VA_RESERVED_CSA_START(adev) (((adev)->vm_manager.max_pfn \
494 #define amdgpu_vm_copy_pte(adev, ib, pe, src, count) ((adev)->vm_manager.vm_pte_funcs->copy_pte((ib…
495 #define amdgpu_vm_write_pte(adev, ib, pe, value, count, incr) ((adev)->vm_manager.vm_pte_funcs->wri…
496 #define amdgpu_vm_set_pte_pde(adev, ib, pe, addr, count, incr, flags) ((adev)->vm_manager.vm_pte_fu…
H A Dmmhub_v4_1_0.c178 adev->vm_manager.vram_base_offset; in mmhub_v4_1_0_init_system_aperture_regs()
315 adev->vm_manager.num_level); in mmhub_v4_1_0_setup_vmid_config()
333 adev->vm_manager.block_size - 9); in mmhub_v4_1_0_setup_vmid_config()
346 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_1_0_setup_vmid_config()
349 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_1_0_setup_vmid_config()
H A Dgfxhub_v3_0_3.c305 adev->vm_manager.num_level); in gfxhub_v3_0_3_setup_vmid_config()
322 adev->vm_manager.block_size - 9); in gfxhub_v3_0_3_setup_vmid_config()
335 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()
338 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_3_setup_vmid_config()
H A Dgfxhub_v2_0.c293 adev->vm_manager.num_level); in gfxhub_v2_0_setup_vmid_config()
310 adev->vm_manager.block_size - 9); in gfxhub_v2_0_setup_vmid_config()
323 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()
326 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v2_0_setup_vmid_config()
H A Dgfxhub_v11_5_0.c303 adev->vm_manager.num_level); in gfxhub_v11_5_0_setup_vmid_config()
320 adev->vm_manager.block_size - 9); in gfxhub_v11_5_0_setup_vmid_config()
333 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v11_5_0_setup_vmid_config()
336 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v11_5_0_setup_vmid_config()
H A Dgfxhub_v3_0.c300 adev->vm_manager.num_level); in gfxhub_v3_0_setup_vmid_config()
317 adev->vm_manager.block_size - 9); in gfxhub_v3_0_setup_vmid_config()
330 lower_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()
333 upper_32_bits(adev->vm_manager.max_pfn - 1)); in gfxhub_v3_0_setup_vmid_config()
H A Dmmhub_v3_0_2.c320 adev->vm_manager.num_level); in mmhub_v3_0_2_setup_vmid_config()
338 adev->vm_manager.block_size - 9); in mmhub_v3_0_2_setup_vmid_config()
351 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()
354 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_2_setup_vmid_config()
H A Dmmhub_v3_0_1.c314 adev->vm_manager.num_level); in mmhub_v3_0_1_setup_vmid_config()
332 adev->vm_manager.block_size - 9); in mmhub_v3_0_1_setup_vmid_config()
345 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()
348 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_1_setup_vmid_config()
H A Dmmhub_v3_0.c321 adev->vm_manager.num_level); in mmhub_v3_0_setup_vmid_config()
339 adev->vm_manager.block_size - 9); in mmhub_v3_0_setup_vmid_config()
352 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()
355 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v3_0_setup_vmid_config()
H A Dmmhub_v2_0.c358 adev->vm_manager.num_level); in mmhub_v2_0_setup_vmid_config()
376 adev->vm_manager.block_size - 9); in mmhub_v2_0_setup_vmid_config()
389 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()
392 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_0_setup_vmid_config()
H A Dmmhub_v2_3.c282 adev->vm_manager.num_level); in mmhub_v2_3_setup_vmid_config()
300 adev->vm_manager.block_size - 9); in mmhub_v2_3_setup_vmid_config()
313 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()
316 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v2_3_setup_vmid_config()
H A Dmmhub_v1_0.c285 num_level = adev->vm_manager.num_level; in mmhub_v1_0_setup_vmid_config()
286 block_size = adev->vm_manager.block_size; in mmhub_v1_0_setup_vmid_config()
327 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_0_setup_vmid_config()
330 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v1_0_setup_vmid_config()
H A Dgmc_v9_0.c1672 adev->vm_manager.vram_base_offset = adev->gfxhub.funcs->get_mc_fb_offset(adev); in gmc_v9_0_vram_gtt_location()
1675 adev->vm_manager.vram_base_offset += in gmc_v9_0_vram_gtt_location()
1917 adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1936 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1945 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
1957 adev->gmc.translate_further = adev->vm_manager.num_level > 1; in gmc_v9_0_sw_init()
2039 adev->vm_manager.first_kfd_vmid = in gmc_v9_0_sw_init()
H A Dmmhub_v4_2_0.c499 adev->vm_manager.num_level); in mmhub_v4_2_0_mid_setup_vmid_config()
517 adev->vm_manager.block_size - 9); in mmhub_v4_2_0_mid_setup_vmid_config()
530 lower_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_2_0_mid_setup_vmid_config()
533 upper_32_bits(adev->vm_manager.max_pfn - 1)); in mmhub_v4_2_0_mid_setup_vmid_config()
H A Damdgpu_amdkfd.c182 ((1 << adev->vm_manager.first_kfd_vmid) - 1), in amdgpu_amdkfd_device_init()
185 .gpuvm_size = min(adev->vm_manager.max_pfn in amdgpu_amdkfd_device_init()
754 return vmid >= adev->vm_manager.first_kfd_vmid; in amdgpu_amdkfd_is_kfd_vmid()
H A Damdgpu_gmc.c1153 vram_addr = adev->vm_manager.vram_base_offset; in amdgpu_gmc_init_pdb0()
1184 return mc_addr - adev->gmc.vram_start + adev->vm_manager.vram_base_offset; in amdgpu_gmc_vram_mc2pa()
1443 adev->vm_manager.vram_base_offset) >> in amdgpu_gmc_get_nps_memranges()
1447 adev->vm_manager.vram_base_offset) >> in amdgpu_gmc_get_nps_memranges()
H A Damdgpu_kms.c989 vm_size = adev->vm_manager.max_pfn * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
1006 dev_info->pte_fragment_size = (1 << adev->vm_manager.fragment_size) * AMDGPU_GPU_PAGE_SIZE; in amdgpu_info_ioctl()
1378 xa_lock_irqsave(&adev->vm_manager.pasids, flags); in amdgpu_info_ioctl()
1382 xa_unlock_irqrestore(&adev->vm_manager.pasids, flags); in amdgpu_info_ioctl()
H A Dmes_userqueue.c127 queue_input.process_va_end = adev->vm_manager.max_pfn - 1; in mes_userq_map()
H A Damdgpu_dev_coredump.c299 fault_info = &coredump->adev->vm_manager.fault_info; in amdgpu_devcoredump_format()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_vm.c62 return rdev->vm_manager.max_pfn >> radeon_vm_block_size; in radeon_vm_num_pdes()
89 if (!rdev->vm_manager.enabled) { in radeon_vm_manager_init()
94 rdev->vm_manager.enabled = true; in radeon_vm_manager_init()
110 if (!rdev->vm_manager.enabled) in radeon_vm_manager_fini()
114 radeon_fence_unref(&rdev->vm_manager.active[i]); in radeon_vm_manager_fini()
116 rdev->vm_manager.enabled = false; in radeon_vm_manager_fini()
186 vm_id->last_id_use == rdev->vm_manager.active[vm_id->id]) in radeon_vm_grab_id()
193 for (i = 1; i < rdev->vm_manager.nvm; ++i) { in radeon_vm_grab_id()
194 struct radeon_fence *fence = rdev->vm_manager.active[i]; in radeon_vm_grab_id()
213 return rdev->vm_manager.active[choices[i]]; in radeon_vm_grab_id()
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H A Dni.c1300 rdev->vm_manager.max_pfn - 1); in cayman_pcie_gart_enable()
1302 rdev->vm_manager.saved_table_addr[i]); in cayman_pcie_gart_enable()
1337 rdev->vm_manager.saved_table_addr[i] = RREG32( in cayman_pcie_gart_disable()
2481 rdev->vm_manager.nvm = 8; in cayman_vm_init()
2486 rdev->vm_manager.vram_base_offset = tmp; in cayman_vm_init()
2488 rdev->vm_manager.vram_base_offset = 0; in cayman_vm_init()

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