Searched refs:vlenb (Results 1 – 5 of 5) sorted by relevance
| /linux/tools/testing/selftests/riscv/vector/ |
| H A D | validate_v_ptrace.c | 40 unsigned long vlenb = get_vr_len(); in TEST() local 64 regset_size = sizeof(*regset_data) + vlenb * 32; in TEST() 87 static volatile unsigned long vlenb; in TEST() local 106 vlenb = get_vr_len(); in TEST() 188 vlenb_csr = ptrace(PTRACE_PEEKDATA, pid, &vlenb, NULL); in TEST() 205 EXPECT_EQ(vlenb_csr, regset_data->vlenb); in TEST() 260 unsigned long vlenb = get_vr_len(); in TEST() local 284 regset_size = sizeof(*regset_data) + vlenb * 32; in TEST() 300 EXPECT_EQ(regset_data->vlenb, regset_data->vl); in TEST() 301 EXPECT_EQ(vlenb, regset_data->vlenb); in TEST() [all …]
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| H A D | vstate_ptrace.c | 75 ksft_print_msg("vlenb %ld\n", v_regset_hdr->vlenb); in do_parent() 76 data = realloc(data, size + v_regset_hdr->vlenb * 32); in do_parent() 80 v31 = (void *)(data + size + v_regset_hdr->vlenb * 31); in do_parent() 81 size += v_regset_hdr->vlenb * 32; in do_parent()
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| /linux/arch/riscv/include/uapi/asm/ |
| H A D | ptrace.h | 106 unsigned long vlenb; member 120 unsigned long vlenb; member
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| /linux/arch/riscv/kernel/ |
| H A D | cpufeature.c | 1017 u32 vlenb = 0; in has_thead_homogeneous_vlenb() local 1032 if (of_property_read_u32(cpu_node, "thead,vlenb", &vlenb)) { in has_thead_homogeneous_vlenb() 1040 if (prev_vlenb && vlenb != prev_vlenb) { in has_thead_homogeneous_vlenb() 1045 prev_vlenb = vlenb; in has_thead_homogeneous_vlenb() 1049 thead_vlenb_of = vlenb; in has_thead_homogeneous_vlenb()
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| /linux/tools/testing/selftests/kvm/riscv/ |
| H A D | get-reg-list.c | 182 /* Enable V extension so that we can get the vlenb register */ in override_vector_reg_size() 189 TEST_FAIL("Can't compute vector register size from zero vlenb\n"); in override_vector_reg_size() 546 case KVM_REG_RISCV_VECTOR_CSR_REG(vlenb): in isa_ext_single_id_to_str() 547 return "KVM_REG_RISCV_VECTOR_CSR_REG(vlenb)"; in isa_ext_single_id_to_str() 1113 KVM_REG_RISCV | KVM_REG_SIZE_ULONG | KVM_REG_RISCV_VECTOR | KVM_REG_RISCV_VECTOR_CSR_REG(vlenb),
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