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Searched refs:vid_clk (Results 1 – 4 of 4) sorted by relevance

/linux/drivers/gpu/drm/xlnx/
H A Dzynqmp_dpsub.c111 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_live_video_in_clk"); in zynqmp_dpsub_init_clocks()
112 if (!IS_ERR(dpsub->vid_clk)) in zynqmp_dpsub_init_clocks()
114 else if (PTR_ERR(dpsub->vid_clk) == -EPROBE_DEFER) in zynqmp_dpsub_init_clocks()
115 return PTR_ERR(dpsub->vid_clk); in zynqmp_dpsub_init_clocks()
117 if (IS_ERR_OR_NULL(dpsub->vid_clk)) { in zynqmp_dpsub_init_clocks()
118 dpsub->vid_clk = devm_clk_get(dpsub->dev, "dp_vtc_pixel_clk_in"); in zynqmp_dpsub_init_clocks()
119 if (IS_ERR(dpsub->vid_clk)) { in zynqmp_dpsub_init_clocks()
121 return PTR_ERR(dpsub->vid_clk); in zynqmp_dpsub_init_clocks()
H A Dzynqmp_dpsub.h64 struct clk *vid_clk; member
H A Dzynqmp_kms.c204 ret = clk_prepare_enable(dpsub->vid_clk); in zynqmp_dpsub_crtc_atomic_enable()
245 clk_disable_unprepare(dpsub->vid_clk); in zynqmp_dpsub_crtc_atomic_disable()
H A Dzynqmp_disp.c1372 ret = clk_set_rate(disp->dpsub->vid_clk, mode_clock); in zynqmp_disp_setup_clock()
1378 rate = clk_get_rate(disp->dpsub->vid_clk); in zynqmp_disp_setup_clock()