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Searched refs:vddc (Results 1 – 25 of 41) sorted by relevance

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/linux/drivers/gpu/drm/radeon/
H A Dbtc_dpm.c1280 u16 *vddc, u16 *vddci) in btc_apply_voltage_delta_rules() argument
1285 if ((0 == *vddc) || (0 == *vddci)) in btc_apply_voltage_delta_rules()
1288 if (*vddc > *vddci) { in btc_apply_voltage_delta_rules()
1289 if ((*vddc - *vddci) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1291 (*vddc - rdev->pm.dpm.dyn_state.vddc_vddci_delta)); in btc_apply_voltage_delta_rules()
1295 if ((*vddci - *vddc) > rdev->pm.dpm.dyn_state.vddc_vddci_delta) { in btc_apply_voltage_delta_rules()
1298 *vddc = (new_voltage < max_vddc) ? new_voltage : max_vddc; in btc_apply_voltage_delta_rules()
1374 if (ulv_pl->vddc) { in btc_populate_ulv_state()
2072 u16 vddc, vddci; in btc_apply_state_adjust_rules() local
2090 if (ps->high.vddc > max_limits->vddc) in btc_apply_state_adjust_rules()
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H A Drv6xx_dpm.c485 pi->hw.vddc[R600_POWER_LEVEL_CTXSW] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
486 pi->hw.vddc[R600_POWER_LEVEL_HIGH] = state->high.vddc; in rv6xx_calculate_voltage_stepping_parameters()
487 pi->hw.vddc[R600_POWER_LEVEL_MEDIUM] = state->medium.vddc; in rv6xx_calculate_voltage_stepping_parameters()
488 pi->hw.vddc[R600_POWER_LEVEL_LOW] = state->low.vddc; in rv6xx_calculate_voltage_stepping_parameters()
508 if ((state->high.vddc == state->medium.vddc) && in rv6xx_calculate_voltage_stepping_parameters()
516 if ((state->medium.vddc == state->low.vddc) && in rv6xx_calculate_voltage_stepping_parameters()
725 pi->hw.vddc[i]); in rv6xx_program_voltage_stepping_parameters_except_lowest_entry()
767 pi->hw.vddc[0]); in rv6xx_program_voltage_stepping_parameters_lowest_entry()
948 pi->hw.vddc[i], in rv6xx_get_master_voltage_mask()
973 new_state->low.vddc, in rv6xx_enable_static_voltage_control()
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H A Dsi_dpm.c1709 s64 kt, kv, leakage_w, i_leakage, vddc; in si_calculate_leakage_for_v_and_t_formula() local
1714 vddc = div64_s64(drm_int2fixp(v), 1000); in si_calculate_leakage_for_v_and_t_formula()
1723 tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; in si_calculate_leakage_for_v_and_t_formula()
1726 kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); in si_calculate_leakage_for_v_and_t_formula()
1728 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); in si_calculate_leakage_for_v_and_t_formula()
1747 s64 kt, kv, leakage_w, i_leakage, vddc; in si_calculate_leakage_for_v_formula() local
1750 vddc = div64_s64(drm_int2fixp(v), 1000); in si_calculate_leakage_for_v_formula()
1754 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); in si_calculate_leakage_for_v_formula()
1756 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); in si_calculate_leakage_for_v_formula()
2229 SISLANDS_SMC_VOLTAGE_VALUE vddc; in si_populate_power_containment_values() local
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H A Drv770_dpm.c567 int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc, in rv770_populate_vddc_value() argument
580 if (vddc <= pi->vddc_table[i].vddc) { in rv770_populate_vddc_value()
582 voltage->value = cpu_to_be16(vddc); in rv770_populate_vddc_value()
665 ret = rv770_populate_vddc_value(rdev, pl->vddc, in rv770_convert_power_level_to_smc()
666 &level->vddc); in rv770_convert_power_level_to_smc()
944 &table->ACPIState.levels[0].vddc); in rv770_populate_smc_acpi_state()
958 &table->ACPIState.levels[0].vddc); in rv770_populate_smc_acpi_state()
1073 initial_state->low.vddc, in rv770_populate_smc_initial_state()
1074 &table->initialState.levels[0].vddc); in rv770_populate_smc_initial_state()
1135 pi->vddc_table[i].vddc)); in rv770_populate_smc_vddc_table()
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H A Dni_dpm.c745 s64 kt, kv, leakage_w, i_leakage, vddc, temperature; in ni_calculate_leakage_for_v_and_t_formula() local
748 vddc = div64_s64(drm_int2fixp(v), 1000); in ni_calculate_leakage_for_v_and_t_formula()
754 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 1000), vddc))); in ni_calculate_leakage_for_v_and_t_formula()
756 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); in ni_calculate_leakage_for_v_and_t_formula()
812 if (ps->performance_levels[i].vddc > max_limits->vddc) in ni_apply_state_adjust_rules()
813 ps->performance_levels[i].vddc = max_limits->vddc; in ni_apply_state_adjust_rules()
836 if (ps->performance_levels[i].vddc < ps->performance_levels[i - 1].vddc) in ni_apply_state_adjust_rules()
837 ps->performance_levels[i].vddc = ps->performance_levels[i - 1].vddc; in ni_apply_state_adjust_rules()
875 max_limits->vddc, &ps->performance_levels[i].vddc); in ni_apply_state_adjust_rules()
881 max_limits->vddc, &ps->performance_levels[i].vddc); in ni_apply_state_adjust_rules()
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H A Drv6xx_dpm.h39 u16 vddc[R600_PM_NUMBER_OF_VOLTAGE_LEVELS]; member
81 u16 vddc; member
H A Drv770_dpm.h66 u16 vddc; member
145 u16 vddc; member
218 int rv770_populate_vddc_value(struct radeon_device *rdev, u16 vddc,
H A Drv730_dpm.c244 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
251 &table->ACPIState.levels[0].vddc); in rv730_populate_smc_acpi_state()
362 initial_state->low.vddc, in rv730_populate_smc_initial_state()
363 &table->initialState.levels[0].vddc); in rv730_populate_smc_initial_state()
H A Dbtc_dpm.h56 u16 *vddc, u16 *vddci);
H A Dci_dpm.c241 static u8 ci_convert_to_vid(u16 vddc) in ci_convert_to_vid() argument
243 return (6200 - (vddc * VOLTAGE_SCALE)) / 25; in ci_convert_to_vid()
268 lo_vid[i] = ci_convert_to_vid(rdev->pm.dpm.dyn_state.cac_leakage_table.entries[i].vddc); in ci_populate_bapm_vddc_vid_sidd()
1312 u16 vddc, vddci; in ci_get_leakage_voltages() local
1321 if (radeon_atom_get_voltage_evv(rdev, virtual_voltage_id, &vddc) != 0) in ci_get_leakage_voltages()
1323 if (vddc != 0 && vddc != virtual_voltage_id) { in ci_get_leakage_voltages()
1324 pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc; in ci_get_leakage_voltages()
1332 if (radeon_atom_get_leakage_vddc_based_on_leakage_params(rdev, &vddc, &vddci, in ci_get_leakage_voltages()
1335 if (vddc != 0 && vddc != virtual_voltage_id) { in ci_get_leakage_voltages()
1336 pi->vddc_leakage.actual_voltage[pi->vddc_leakage.count] = vddc; in ci_get_leakage_voltages()
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H A Drv770_smc.h104 RV770_SMC_VOLTAGE_VALUE vddc; member
H A Drv740_dpm.c337 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
345 &table->ACPIState.levels[0].vddc); in rv740_populate_smc_acpi_state()
H A Dnislands_smc.h104 NISLANDS_SMC_VOLTAGE_VALUE vddc; member
H A Dradeon_atombios.c2373 u16 *vddc, u16 *vddci, u16 *mvdd) in radeon_atombios_get_default_voltages() argument
2381 *vddc = 0; in radeon_atombios_get_default_voltages()
2390 *vddc = le16_to_cpu(firmware_info->info_14.usBootUpVDDCVoltage); in radeon_atombios_get_default_voltages()
2405 u16 vddc, vddci, mvdd; in radeon_atombios_parse_pplib_non_clock_info() local
2407 radeon_atombios_get_default_voltages(rdev, &vddc, &vddci, &mvdd); in radeon_atombios_parse_pplib_non_clock_info()
2462 if (vddc) in radeon_atombios_parse_pplib_non_clock_info()
2464 vddc; in radeon_atombios_parse_pplib_non_clock_info()
2478 u16 vddc; in radeon_atombios_parse_pplib_clock_info() local
2550 &vddc) == 0) in radeon_atombios_parse_pplib_clock_info()
2551 rdev->pm.power_state[state_index].clock_info[mode_index].voltage.voltage = vddc; in radeon_atombios_parse_pplib_clock_info()
[all …]
/linux/drivers/gpu/drm/amd/pm/legacy-dpm/
H A Dsi_dpm.c1877 s64 kt, kv, leakage_w, i_leakage, vddc; in si_calculate_leakage_for_v_and_t_formula() local
1882 vddc = div64_s64(drm_int2fixp(v), 1000); in si_calculate_leakage_for_v_and_t_formula()
1891 tmp = drm_fixp_mul(t_slope, vddc) + t_intercept; in si_calculate_leakage_for_v_and_t_formula()
1894 kv = drm_fixp_mul(av, drm_fixp_exp(drm_fixp_mul(bv, vddc))); in si_calculate_leakage_for_v_and_t_formula()
1896 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); in si_calculate_leakage_for_v_and_t_formula()
1915 s64 kt, kv, leakage_w, i_leakage, vddc; in si_calculate_leakage_for_v_formula() local
1918 vddc = div64_s64(drm_int2fixp(v), 1000); in si_calculate_leakage_for_v_formula()
1922 drm_fixp_exp(drm_fixp_mul(div64_s64(drm_int2fixp(coeff->bv), 100000000), vddc))); in si_calculate_leakage_for_v_formula()
1924 leakage_w = drm_fixp_mul(drm_fixp_mul(drm_fixp_mul(i_leakage, kt), kv), vddc); in si_calculate_leakage_for_v_formula()
2399 SISLANDS_SMC_VOLTAGE_VALUE vddc; in si_populate_power_containment_values() local
3331 btc_apply_voltage_delta_rules(struct amdgpu_device * adev,u16 max_vddc,u16 max_vddci,u16 * vddc,u16 * vddci) btc_apply_voltage_delta_rules() argument
3417 u16 vddc; rv770_get_max_vddc() local
3452 u16 vddc, vddci, min_vce_voltage = 0; si_apply_state_adjust_rules() local
3753 u16 vddc, count = 0; si_get_leakage_vddc() local
7299 u16 vddc, vddci, mvdd; si_parse_pplib_clock_info() local
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/linux/drivers/gpu/drm/amd/pm/swsmu/smu11/
H A Dcyan_skillfish_ppt.c58 uint32_t vddc; member
471 cyan_skillfish_user_settings.vddc = input[2]; in cyan_skillfish_od_edit_dpm_table()
481 cyan_skillfish_user_settings.vddc = CYAN_SKILLFISH_VDDC_MAGIC; in cyan_skillfish_od_edit_dpm_table()
497 if ((cyan_skillfish_user_settings.vddc != CYAN_SKILLFISH_VDDC_MAGIC) && in cyan_skillfish_od_edit_dpm_table()
498 (cyan_skillfish_user_settings.vddc < CYAN_SKILLFISH_VDDC_MIN || in cyan_skillfish_od_edit_dpm_table()
499 cyan_skillfish_user_settings.vddc > CYAN_SKILLFISH_VDDC_MAX)) { in cyan_skillfish_od_edit_dpm_table()
512 if (cyan_skillfish_user_settings.vddc == CYAN_SKILLFISH_VDDC_MAGIC) { in cyan_skillfish_od_edit_dpm_table()
523 vid = (1550 - cyan_skillfish_user_settings.vddc) * 160 / 1000; in cyan_skillfish_od_edit_dpm_table()
/linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
H A Dhwmgr_ppt.h37 uint16_t vddc; member
66 uint16_t vddc; member
H A Dsmu7_hwmgr.c958 entries[i].vddc = dep_sclk_table->entries[i].vddc; in smu7_odn_initial_default_setting()
970 entries[i].vddc = dep_mclk_table->entries[i].vddc; in smu7_odn_initial_default_setting()
996 || min_vddc > dep_sclk_table->entries[0].vddc) in smu7_setup_voltage_range_from_vbios()
997 min_vddc = dep_sclk_table->entries[0].vddc; in smu7_setup_voltage_range_from_vbios()
1000 || max_vddc < dep_sclk_table->entries[dep_sclk_table->count-1].vddc) in smu7_setup_voltage_range_from_vbios()
1001 max_vddc = dep_sclk_table->entries[dep_sclk_table->count-1].vddc; in smu7_setup_voltage_range_from_vbios()
1041 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in smu7_check_dpm_table_updated()
1050 if (dep_table->entries[i].vddc != odn_dep_table->entries[i].vddc) { in smu7_check_dpm_table_updated()
2051 uint16_t vddc = 0; in smu7_get_evv_voltages() local
2120 sclk, vv_id, &vddc) == 0) { in smu7_get_evv_voltages()
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/linux/arch/arm64/boot/dts/freescale/
H A Dimx8mp-venice-gw74xx-rpidsi.dtso50 vddc-supply = <&attiny>;
H A Dimx8mm-venice-gw72xx-0x-rpidsi.dtso54 vddc-supply = <&attiny>;
H A Dimx8mm-venice-gw73xx-0x-rpidsi.dtso54 vddc-supply = <&attiny>;
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dpolaris10_smumgr.c370 *voltage |= (dep_table->entries[i].vddc * in polaris10_get_dependency_volt_by_clk()
380 (dep_table->entries[i].vddc - in polaris10_get_dependency_volt_by_clk()
398 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in polaris10_get_dependency_volt_by_clk()
407 (dep_table->entries[i].vddc - in polaris10_get_dependency_volt_by_clk()
1385 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in polaris10_populate_smc_vce_level()
1389 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); in polaris10_populate_smc_vce_level()
1391 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; in polaris10_populate_smc_vce_level()
1434 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in polaris10_populate_smc_samu_level()
1438 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); in polaris10_populate_smc_samu_level()
1440 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; in polaris10_populate_smc_samu_level()
[all …]
H A Dvegam_smumgr.c617 *voltage |= (dep_table->entries[i].vddc * in vegam_get_dependency_volt_by_clk()
627 (dep_table->entries[i].vddc - in vegam_get_dependency_volt_by_clk()
645 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in vegam_get_dependency_volt_by_clk()
655 (dep_table->entries[i - 1].vddc - in vegam_get_dependency_volt_by_clk()
1214 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in vegam_populate_smc_vce_level()
1218 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); in vegam_populate_smc_vce_level()
1220 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; in vegam_populate_smc_vce_level()
1328 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in vegam_populate_smc_uvd_level()
1332 mm_table->entries[count].vddc - VDDC_VDDCI_DELTA); in vegam_populate_smc_uvd_level()
1334 vddci = mm_table->entries[count].vddc - VDDC_VDDCI_DELTA; in vegam_populate_smc_uvd_level()
H A Dfiji_smumgr.c369 *voltage |= (dep_table->entries[i].vddc * in fiji_get_dependency_volt_by_clk()
379 (dep_table->entries[i].vddc - in fiji_get_dependency_volt_by_clk()
397 *voltage |= (dep_table->entries[i - 1].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in fiji_get_dependency_volt_by_clk()
404 (dep_table->entries[i].vddc - in fiji_get_dependency_volt_by_clk()
1436 (mm_table->entries[count].vddc * VOLTAGE_SCALE) << VDDC_SHIFT; in fiji_populate_smc_vce_level()
1438 ((mm_table->entries[count].vddc - VDDC_VDDCI_DELTA) * in fiji_populate_smc_vce_level()
1473 table->AcpLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in fiji_populate_smc_acp_level()
1475 table->AcpLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - in fiji_populate_smc_acp_level()
1571 table->UvdLevel[count].MinVoltage |= (mm_table->entries[count].vddc * in fiji_populate_smc_uvd_level()
1573 table->UvdLevel[count].MinVoltage |= ((mm_table->entries[count].vddc - in fiji_populate_smc_uvd_level()
/linux/drivers/gpu/drm/amd/pm/swsmu/smu12/
H A Dsmu_v12_0.c308 smu->smu_table.boot_values.vddc = v_3_1->bootup_vddc_mv; in smu_v12_0_get_vbios_bootup_values()
325 smu->smu_table.boot_values.vddc = v_3_3->bootup_vddc_mv; in smu_v12_0_get_vbios_bootup_values()

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