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Searched refs:vco_freq (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/clk/
H A Dclk-plldig.c60 unsigned int vco_freq; member
123 return DIV_ROUND_UP(data->vco_freq, rfdphi1); in plldig_recalc_rate()
126 static unsigned long plldig_calc_target_div(unsigned long vco_freq, in plldig_calc_target_div() argument
131 div = DIV_ROUND_CLOSEST(vco_freq, target_rate); in plldig_calc_target_div()
144 div = plldig_calc_target_div(data->vco_freq, req->rate); in plldig_determine_rate()
145 req->rate = DIV_ROUND_UP(data->vco_freq, div); in plldig_determine_rate()
158 rfdphi1 = plldig_calc_target_div(data->vco_freq, rate); in plldig_set_rate()
198 if (data->vco_freq) { in plldig_init()
199 mfd = data->vco_freq / parent_rate; in plldig_init()
200 lltmp = data->vco_freq % parent_rate; in plldig_init()
[all …]
H A Dclk-highbank.c96 unsigned long divf, divq, vco_freq, reg; in clk_pll_recalc_rate() local
104 vco_freq = parent_rate * (divf + 1); in clk_pll_recalc_rate()
106 return vco_freq / (1 << divq); in clk_pll_recalc_rate()
113 unsigned long vco_freq; in clk_pll_calc() local
125 vco_freq = rate * (1 << divq); in clk_pll_calc()
126 divf = (vco_freq + (ref_freq / 2)) / ref_freq; in clk_pll_calc()
/linux/drivers/gpu/drm/vc4/
H A Dvc4_hdmi_phy.c181 unsigned long long vco_freq = clock; in phy_get_vco_freq() local
185 while (vco_freq < 3000000000ULL) { in phy_get_vco_freq()
187 vco_freq = clock * _vco_div * 10; in phy_get_vco_freq()
190 if (vco_freq > 4500000000ULL) in phy_get_vco_freq()
196 return vco_freq; in phy_get_vco_freq()
199 static u8 phy_get_cp_current(unsigned long vco_freq) in phy_get_cp_current() argument
201 if (vco_freq < 3700000000ULL) in phy_get_cp_current()
207 static u32 phy_get_rm_offset(unsigned long long vco_freq) in phy_get_rm_offset() argument
213 offset = vco_freq * 2; in phy_get_rm_offset()
221 static u8 phy_get_vco_gain(unsigned long long vco_freq) in phy_get_vco_gain() argument
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/linux/drivers/clk/socfpga/
H A Dclk-pll-s10.c66 unsigned long long vco_freq; in agilex_clk_pll_recalc_rate() local
72 vco_freq = (unsigned long long)parent_rate / arefdiv; in agilex_clk_pll_recalc_rate()
78 vco_freq = (unsigned long long)vco_freq * mdiv; in agilex_clk_pll_recalc_rate()
79 return (unsigned long)vco_freq; in agilex_clk_pll_recalc_rate()
89 unsigned long long vco_freq; in clk_pll_recalc_rate() local
95 vco_freq = parent_rate; in clk_pll_recalc_rate()
96 do_div(vco_freq, refdiv); in clk_pll_recalc_rate()
101 vco_freq = (unsigned long long)vco_freq * (mdiv + 6); in clk_pll_recalc_rate()
103 return (unsigned long)vco_freq; in clk_pll_recalc_rate()
H A Dclk-pll-a10.c39 unsigned long long vco_freq; in clk_pll_recalc_rate() local
45 vco_freq = (unsigned long long)parent_rate * (divf + 1); in clk_pll_recalc_rate()
46 do_div(vco_freq, (1 + divq)); in clk_pll_recalc_rate()
47 return (unsigned long)vco_freq; in clk_pll_recalc_rate()
H A Dclk-pll.c43 unsigned long long vco_freq; in clk_pll_recalc_rate() local
53 vco_freq = (unsigned long long)parent_rate * (divf + 1); in clk_pll_recalc_rate()
54 do_div(vco_freq, (1 + divq)); in clk_pll_recalc_rate()
55 return (unsigned long)vco_freq; in clk_pll_recalc_rate()
/linux/drivers/gpu/drm/radeon/
H A Dradeon_uvd.c906 static unsigned radeon_uvd_calc_upll_post_div(unsigned vco_freq, in radeon_uvd_calc_upll_post_div() argument
911 unsigned post_div = vco_freq / target_freq; in radeon_uvd_calc_upll_post_div()
918 if ((vco_freq / post_div) > target_freq) in radeon_uvd_calc_upll_post_div()
958 unsigned vco_freq, ref_freq = rdev->clock.spll.reference_freq; in radeon_uvd_calc_upll_dividers() local
965 for (vco_freq = vco_min; vco_freq <= vco_max; vco_freq += 100) { in radeon_uvd_calc_upll_dividers()
967 uint64_t fb_div = (uint64_t)vco_freq * fb_factor; in radeon_uvd_calc_upll_dividers()
979 vclk_div = radeon_uvd_calc_upll_post_div(vco_freq, vclk, in radeon_uvd_calc_upll_dividers()
985 dclk_div = radeon_uvd_calc_upll_post_div(vco_freq, dclk, in radeon_uvd_calc_upll_dividers()
991 score = vclk - (vco_freq / vclk_div) + dclk - (vco_freq / dclk_div); in radeon_uvd_calc_upll_dividers()
H A Drv6xx_dpm.c533 static inline u32 rv6xx_calculate_spread_spectrum_clk_v(u32 vco_freq, u32 ref_freq, in rv6xx_calculate_spread_spectrum_clk_v() argument
537 u32 fb_divider = vco_freq / ref_freq; in rv6xx_calculate_spread_spectrum_clk_v()
540 (5375 * ((vco_freq * 10) / (4096 >> fb_divider_scale)))); in rv6xx_calculate_spread_spectrum_clk_v()
555 u32 vco_freq, clk_v, clk_s; in rv6xx_program_engine_spread_spectrum() local
561 vco_freq = rv6xx_calculate_vco_frequency(ref_clk, &dividers, in rv6xx_program_engine_spread_spectrum()
565 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv6xx_program_engine_spread_spectrum()
566 clk_v = rv6xx_calculate_spread_spectrum_clk_v(vco_freq, in rv6xx_program_engine_spread_spectrum()
634 u32 *vco_freq) in rv6xx_find_memory_clock_with_highest_vco() argument
645 if (vco_freq_temp > *vco_freq) { in rv6xx_find_memory_clock_with_highest_vco()
647 *vco_freq = vco_freq_temp; in rv6xx_find_memory_clock_with_highest_vco()
[all …]
H A Drv740_dpm.c159 u32 vco_freq = engine_clock * dividers.post_div; in rv740_populate_sclk_value() local
162 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv740_populate_sclk_value()
246 u32 vco_freq = memory_clock * dividers.post_div; in rv740_populate_mclk_value() local
249 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in rv740_populate_mclk_value()
H A Drv730_dpm.c90 u32 vco_freq = engine_clock * post_divider; in rv730_populate_sclk_value() local
93 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv730_populate_sclk_value()
165 u32 vco_freq = memory_clock * post_divider; in rv730_populate_mclk_value() local
168 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in rv730_populate_mclk_value()
H A Dradeon_atombios.c1120 rdev->clock.vco_freq = in radeon_atombios_get_dentist_vco_freq()
1277 rdev->clock.vco_freq = in radeon_atom_get_clock_info()
1280 rdev->clock.vco_freq = rdev->clock.current_dispclk; in radeon_atom_get_clock_info()
1284 rdev->clock.vco_freq = rdev->clock.current_dispclk; in radeon_atom_get_clock_info()
1286 if (rdev->clock.vco_freq == 0) in radeon_atom_get_clock_info()
1287 rdev->clock.vco_freq = 360000; /* 3.6 GHz */ in radeon_atom_get_clock_info()
H A Dni_dpm.c2042 u32 vco_freq = engine_clock * dividers.post_div; in ni_calculate_sclk_params() local
2045 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in ni_calculate_sclk_params()
2238 u32 vco_freq = memory_clock * dividers.post_div; in ni_populate_mclk_value() local
2241 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in ni_populate_mclk_value()
H A Dcypress_dpm.c554 u32 vco_freq = memory_clock * dividers.post_div; in cypress_populate_mclk_value() local
557 ASIC_INTERNAL_MEMORY_SS, vco_freq)) { in cypress_populate_mclk_value()
H A Drv770_dpm.c541 u32 vco_freq = engine_clock * post_divider; in rv770_populate_sclk_value() local
544 ASIC_INTERNAL_ENGINE_SS, vco_freq)) { in rv770_populate_sclk_value()
H A Dradeon.h279 uint32_t vco_freq; member
/linux/drivers/gpu/drm/msm/hdmi/
H A Dhdmi_phy_8996.c74 u64 vco_freq; member
171 u64 vco_freq[60]; in pll_get_post_div() local
187 vco_freq[vco_freq_index++] = vco; in pll_get_post_div()
192 u64 vco_tmp = vco_freq[i]; in pll_get_post_div()
207 pd->vco_freq = vco_optimal; in pll_get_post_div()
248 dec_start = pd.vco_freq; in pll_calculate()
252 frac_start = pd.vco_freq * (1 << 20); in pll_calculate()
265 fdata = pd.vco_freq; in pll_calculate()
270 DBG("VCO freq: %llu", pd.vco_freq); in pll_calculate()
H A Dhdmi_phy_8998.c73 u64 vco_freq; member
274 pd->vco_freq = found_vco_freq; in pll_get_post_div()
306 dec_start = pd.vco_freq; in pll_calculate()
310 frac_start = pd.vco_freq * (1 << 20); in pll_calculate()
323 fdata = pd.vco_freq; in pll_calculate()
/linux/drivers/clk/xilinx/
H A Dclk-xlnx-clock-wizard.c337 u64 vco_freq, freq, diff, vcomin, vcomax; in clk_wzrd_get_divisors_ver() local
352 vco_freq = DIV_ROUND_CLOSEST((parent_rate * m), d); in clk_wzrd_get_divisors_ver()
353 if (vco_freq >= vcomin && vco_freq <= vcomax) { in clk_wzrd_get_divisors_ver()
355 freq = DIV_ROUND_CLOSEST_ULL(vco_freq, o); in clk_wzrd_get_divisors_ver()
375 u64 vco_freq, freq, diff, vcomin, vcomax; in clk_wzrd_get_divisors() local
390 vco_freq = DIV_ROUND_CLOSEST((parent_rate * m), d); in clk_wzrd_get_divisors()
391 if (vco_freq >= vcomin && vco_freq <= vcomax) { in clk_wzrd_get_divisors()
393 freq = DIV_ROUND_CLOSEST_ULL(vco_freq, o); in clk_wzrd_get_divisors()
499 unsigned long vco_freq, rate_div, clockout0_div; in clk_wzrd_dynamic_all_nolock() local
508 vco_freq = DIV_ROUND_CLOSEST(parent_rate * divider->m, divider->d); in clk_wzrd_dynamic_all_nolock()
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/linux/drivers/media/dvb-frontends/
H A Dstv6110.c252 u32 divider, ref, p, presc, i, result_freq, vco_freq; in stv6110_set_frequency() local
329 vco_freq = divider * ((priv->mclk / 1000) / ((1 << (r_div_opt + 1)))); in stv6110_set_frequency()
331 ret, result_freq, vco_freq); in stv6110_set_frequency()
/linux/drivers/gpu/drm/amd/display/dc/inc/
H A Dclock_source.h111 uint32_t vco_freq; member
/linux/drivers/media/tuners/
H A Dr820t.c541 u32 vco_freq; in r820t_set_pll() local
632 vco_freq = freq * mix_div; in r820t_set_pll()
633 nint = vco_freq / (2 * pll_ref); in r820t_set_pll()
634 vco_fra = vco_freq - 2 * pll_ref * nint; in r820t_set_pll()
/linux/drivers/net/wireless/broadcom/b43/
H A Dphy_lp.c2484 u32 freqref, vco_freq, val1, val2, val3, timeout, timeoutref, count; in lpphy_b2063_tune() local
2516 vco_freq = chandata->freq << 1; in lpphy_b2063_tune()
2518 vco_freq = chandata->freq << 2; in lpphy_b2063_tune()
2523 val3 = lpphy_qdiv_roundup(vco_freq, 3, 16); in lpphy_b2063_tune()
/linux/drivers/gpu/drm/amd/pm/powerplay/smumgr/
H A Dfiji_smumgr.c902 uint32_t vco_freq = clock * dividers.uc_pll_post_div; in fiji_calculate_sclk_params() local
904 vco_freq, &ssInfo)) { in fiji_calculate_sclk_params()
H A Dci_smumgr.c343 uint32_t vco_freq = clock * dividers.uc_pll_post_div; in ci_calculate_sclk_params() local
346 vco_freq, &ss_info)) { in ci_calculate_sclk_params()
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_clock_source.c244 pll_settings->vco_freq = in calc_fb_divider_checking_tolerance()

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