Searched refs:vcn_reg_list_4_0_5 (Results 1 – 1 of 1) sorted by relevance
55 static const struct amdgpu_hwip_reg_entry vcn_reg_list_4_0_5[] = { variable136 uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5); in vcn_v4_0_5_sw_init()1623 uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5); in vcn_v4_0_5_print_ip_state()1643 drm_printf(p, "%-50s \t 0x%08x\n", vcn_reg_list_4_0_5[j].reg_name, in vcn_v4_0_5_print_ip_state()1657 uint32_t reg_count = ARRAY_SIZE(vcn_reg_list_4_0_5); in vcn_v4_0_5_dump_ip_state()1675 RREG32(SOC15_REG_ENTRY_OFFSET_INST(vcn_reg_list_4_0_5[j], in vcn_v4_0_5_dump_ip_state()