| /linux/arch/s390/kernel/ |
| H A D | cert_store.c | 128 struct vce { struct
179 static void pr_dbf_vce(const struct vce *e) in pr_dbf_vce()
260 static int check_certificate_hash(const struct vce *vce) in check_certificate_hash() argument
266 vce_hash = (u8 *)vce + vce->vce_hdr.vc_hash_offset; in check_certificate_hash()
267 vc_hash_length = vce->vce_hdr.vc_hash_length; in check_certificate_hash()
268 sha256((u8 *)vce + vce->vce_hdr.vc_offset, vce->vce_hdr.vc_length, hash); in check_certificate_hash()
281 static int check_certificate_valid(const struct vce *vce) in check_certificate_valid() argument
283 if (!(vce->vce_hdr.flags & VCE_FLAGS_VALID_MASK)) { in check_certificate_valid()
287 if (vce->vce_hdr.vc_format != 1) { in check_certificate_valid()
291 if (vce->vce_hdr.vc_hash_type != 1) { in check_certificate_valid()
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| /linux/drivers/gpu/drm/amd/amdgpu/ |
| H A D | vce_v3_0.c | 83 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_rptr()
84 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_rptr()
86 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_rptr()
115 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_get_wptr()
116 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_get_wptr()
118 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_get_wptr()
146 if (adev->vce.harvest_config == 0 || in vce_v3_0_ring_set_wptr()
147 adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE1) in vce_v3_0_ring_set_wptr()
149 else if (adev->vce.harvest_config == AMDGPU_VCE_HARVEST_VCE0) in vce_v3_0_ring_set_wptr()
272 if (adev->vce.harvest_config & (1 << idx)) in vce_v3_0_start()
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| H A D | vce_v1_0.c | 199 hdr = (const struct common_firmware_header *)adev->vce.fw->data; in vce_v1_0_load_fw()
202 cpu_addr = adev->vce.cpu_addr; in vce_v1_0_load_fw()
204 sign = (void *)adev->vce.fw->data + ucode_offset; in vce_v1_0_load_fw()
235 memset_io(&cpu_addr[0], 0, amdgpu_bo_size(adev->vce.vcpu_bo)); in vce_v1_0_load_fw()
247 adev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); in vce_v1_0_load_fw()
256 dev_dbg(adev->dev, "VCE keyselect: %d", adev->vce.keyselect); in vce_v1_0_wait_for_fw_validation()
257 WREG32(mmVCE_LMI_FW_START_KEYSEL, adev->vce.keyselect); in vce_v1_0_wait_for_fw_validation()
300 RREG32(mmVCE_LMI_FW_START_KEYSEL), adev->vce.keyselect); in vce_v1_0_mc_resume()
322 offset = adev->vce.gpu_addr + AMDGPU_VCE_FIRMWARE_OFFSET; in vce_v1_0_mc_resume()
338 WARN_ON((offset + size - adev->vce.gpu_addr) > amdgpu_bo_size(adev->vce.vcpu_bo)); in vce_v1_0_mc_resume()
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| H A D | vce_v2_0.c | 188 WREG32(mmVCE_LMI_VCPU_CACHE_40BIT_BAR, (adev->vce.gpu_addr >> 8)); in vce_v2_0_mc_resume()
248 ring = &adev->vce.ring[0]; in vce_v2_0_start()
255 ring = &adev->vce.ring[1]; in vce_v2_0_start()
421 adev->vce.num_rings = 2; in vce_v2_0_early_init()
436 r = amdgpu_irq_add_id(adev, AMDGPU_IRQ_CLIENTID_LEGACY, 167, &adev->vce.irq); in vce_v2_0_sw_init()
449 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v2_0_sw_init()
452 ring = &adev->vce.ring[i]; in vce_v2_0_sw_init()
454 r = amdgpu_ring_init(adev, ring, 512, &adev->vce.irq, 0, in vce_v2_0_sw_init()
483 for (i = 0; i < adev->vce.num_rings; i++) { in vce_v2_0_hw_init()
484 r = amdgpu_ring_test_helper(&adev->vce.ring[i]); in vce_v2_0_hw_init()
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| H A D | amdgpu_kms.c | 221 fw_info->ver = adev->vce.fw_version; in amdgpu_firmware_info()
222 fw_info->feature = adev->vce.fb_version; in amdgpu_firmware_info()
508 for (i = 0; i < adev->vce.num_rings; i++) in amdgpu_hw_ip_info()
509 if (adev->vce.ring[i].sched.ready && in amdgpu_hw_ip_info()
510 !adev->vce.ring[i].no_user_submission) in amdgpu_hw_ip_info()
993 if (adev->vce.fw_version && in amdgpu_info_ioctl()
994 adev->vce.fw_version < AMDGPU_VCE_FW_53_45) in amdgpu_info_ioctl()
1017 dev_info->vce_harvest_config = adev->vce.harvest_config; in amdgpu_info_ioctl()
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| H A D | amdgpu_dev_coredump.c | 90 adev->vce.fb_version, adev->vce.fw_version); in amdgpu_devcoredump_fw_info()
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| H A D | amdgpu.h | 1002 struct amdgpu_vce vce; member
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| /linux/drivers/gpu/drm/radeon/ |
| H A D | vce_v1_0.c | 205 rdev->vce.keyselect = le32_to_cpu(sign->val[i].keyselect); in vce_v1_0_load_fw()
218 uint64_t addr = rdev->vce.gpu_addr; in vce_v1_0_resume()
254 WREG32(VCE_LMI_FW_START_KEYSEL, rdev->vce.keyselect); in vce_v1_0_resume()
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| H A D | vce_v2_0.c | 160 uint64_t addr = rdev->vce.gpu_addr; in vce_v2_0_resume()
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| H A D | radeon_kms.c | 532 *value = rdev->vce.fw_version; in radeon_info_ioctl()
535 *value = rdev->vce.fb_version; in radeon_info_ioctl()
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| /linux/drivers/gpu/drm/amd/pm/powerplay/hwmgr/ |
| H A D | smu10_hwmgr.h | 111 uint32_t vce : 1; member
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| H A D | smu8_hwmgr.h | 134 uint32_t vce : 1; member
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| /linux/drivers/scsi/qla2xxx/ |
| H A D | qla_isr.c | 2880 struct vp_ctrl_entry_24xx *vce) in qla_ctrlvp_completed() argument
2886 sp = qla2x00_get_sp_from_handle(vha, func, req, vce); in qla_ctrlvp_completed()
2890 if (vce->entry_status != 0) { in qla_ctrlvp_completed()
2893 sp->name, vce->entry_status); in qla_ctrlvp_completed()
2895 } else if (vce->comp_status != cpu_to_le16(CS_COMPLETE)) { in qla_ctrlvp_completed()
2898 sp->name, le16_to_cpu(vce->comp_status), in qla_ctrlvp_completed()
2899 le16_to_cpu(vce->vp_idx_failed)); in qla_ctrlvp_completed()
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| H A D | qla_iocb.c | 3813 qla25xx_ctrlvp_iocb(srb_t *sp, struct vp_ctrl_entry_24xx *vce) in qla25xx_ctrlvp_iocb() argument
3817 vce->entry_type = VP_CTRL_IOCB_TYPE; in qla25xx_ctrlvp_iocb()
3818 vce->handle = sp->handle; in qla25xx_ctrlvp_iocb()
3819 vce->entry_count = 1; in qla25xx_ctrlvp_iocb()
3820 vce->command = cpu_to_le16(sp->u.iocb_cmd.u.ctrlvp.cmd); in qla25xx_ctrlvp_iocb()
3821 vce->vp_count = cpu_to_le16(1); in qla25xx_ctrlvp_iocb()
3829 vce->vp_idx_map[map] |= 1 << pos; in qla25xx_ctrlvp_iocb()
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