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Searched refs:vblank_start (Results 1 – 25 of 28) sorted by relevance

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/linux/drivers/gpu/drm/i915/display/
H A Dintel_vblank.c184 u32 vblank_start = mode->crtc_vblank_start; in __intel_get_crtc_scanline_from_timestamp() local
190 scanline = (scanline + vblank_start) % vtotal; in __intel_get_crtc_scanline_from_timestamp()
572 int vblank_start = mode->crtc_vblank_start; in intel_mode_vblank_start() local
575 vblank_start = DIV_ROUND_UP(vblank_start, 2); in intel_mode_vblank_start()
577 return vblank_start; in intel_mode_vblank_start()
634 evade->vblank_start = intel_vrr_vmin_vblank_start(crtc_state); in intel_vblank_evade_init()
636 evade->vblank_start = intel_vrr_vmax_vblank_start(crtc_state); in intel_vblank_evade_init()
638 evade->vblank_start = intel_mode_vblank_start(adjusted_mode); in intel_vblank_evade_init()
642 evade->min = evade->vblank_start - intel_usecs_to_scanlines(adjusted_mode, in intel_vblank_evade_init()
644 evade->max = evade->vblank_start - 1; in intel_vblank_evade_init()
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H A Dintel_crt.c717 u32 vblank, vblank_start, vblank_end; in intel_crt_load_detect() local
734 vblank_start = REG_FIELD_GET(VBLANK_START_MASK, vblank) + 1; in intel_crt_load_detect()
766 if (vblank_start <= vactive && vblank_end >= vtotal) { in intel_crt_load_detect()
771 vblank_start = vsync_start; in intel_crt_load_detect()
774 VBLANK_START(vblank_start - 1) | in intel_crt_load_detect()
779 if (vblank_start - vactive >= vtotal - vblank_end) in intel_crt_load_detect()
780 vsample = (vblank_start + vactive) >> 1; in intel_crt_load_detect()
H A Dintel_vblank.h19 int min, max, vblank_start; member
H A Dintel_vbt_defs.h626 u16 vblank_start; member
/linux/drivers/media/platform/xilinx/
H A Dxilinx-vtc.h26 unsigned int vblank_start; member
/linux/drivers/gpu/drm/amd/display/dc/dml2/
H A Ddml2_utils.c242 unsigned int hactive, vactive, hblank_start, vblank_start, hblank_end, vblank_end; in populate_pipe_ctx_dlg_params_from_dml() local
248 vblank_start = pipe_ctx->stream->timing.v_total - pipe_ctx->stream->timing.v_front_porch; in populate_pipe_ctx_dlg_params_from_dml()
251 vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in populate_pipe_ctx_dlg_params_from_dml()
267 pipe_ctx->pipe_dlg_param.vblank_start = vblank_start; in populate_pipe_ctx_dlg_params_from_dml()
H A Ddml2_translation_helper.c750 dml_uint_t hblank_start, vblank_start; in populate_dml_timing_cfg_from_stream_state() local
767 vblank_start = in->timing.v_total - in->timing.v_front_porch; in populate_dml_timing_cfg_from_stream_state()
768 out->VBlankEnd[location] = vblank_start in populate_dml_timing_cfg_from_stream_state()
/linux/drivers/video/fbdev/
H A Dgbefb.c518 timing->vblank_start = var->yres; in compute_gbe_timing()
560 SET_GBE_FIELD(VT_VBLANK, VBLANK_ON, val, timing->vblank_start); in gbe_set_timing_info()
572 SET_GBE_FIELD(VT_VCMAP, VCMAP_ON, val, timing->vblank_start); in gbe_set_timing_info()
581 temp = timing->vblank_start - timing->vblank_end - 1; in gbe_set_timing_info()
626 SET_GBE_FIELD(VT_VPIXEN, VPIXEN_OFF, val, timing->vblank_start); in gbe_set_timing_info()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/
H A Ddisplay_rq_dlg_calc_20.c801 unsigned int vblank_start = dst->vblank_start; in dml20_rq_dlg_get_dlg_params() local
934 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20_rq_dlg_get_dlg_params()
1051 vblank_start, in dml20_rq_dlg_get_dlg_params()
H A Ddisplay_rq_dlg_calc_20v2.c801 unsigned int vblank_start = dst->vblank_start; in dml20v2_rq_dlg_get_dlg_params() local
934 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml20v2_rq_dlg_get_dlg_params()
1052 vblank_start, in dml20v2_rq_dlg_get_dlg_params()
H A Ddcn20_fpu.c1394 pipes[pipe_cnt].pipe.dest.vblank_start = v_total - front_porch; in dcn20_populate_dml_pipes_from_context()
1395 pipes[pipe_cnt].pipe.dest.vblank_end = pipes[pipe_cnt].pipe.dest.vblank_start in dcn20_populate_dml_pipes_from_context()
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn21/
H A Ddisplay_rq_dlg_calc_21.c847 unsigned int vblank_start = dst->vblank_start; in dml_rq_dlg_get_dlg_params() local
980 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
1092 vblank_start, in dml_rq_dlg_get_dlg_params()
/linux/drivers/gpu/drm/amd/display/dc/dml/
H A Ddml1_display_rq_dlg_calc.c1011 unsigned int vblank_start = e2e_pipe_param->pipe.dest.vblank_start; in dml1_rq_dlg_get_dlg_params() local
1172 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml1_rq_dlg_get_dlg_params()
1260 vblank_start, in dml1_rq_dlg_get_dlg_params()
H A Ddisplay_mode_lib.c227 dml_print("DML PARAMS: vblank_start = %d\n", pipe_dest->vblank_start); in dml_log_pipe_params()
H A Ddisplay_mode_structs.h514 unsigned int vblank_start; member
/linux/drivers/gpu/drm/amd/display/dc/dml/dcn30/
H A Ddisplay_rq_dlg_calc_30.c913 unsigned int vblank_start = dst->vblank_start; in dml_rq_dlg_get_dlg_params() local
1048 dlg_vblank_start = interlaced ? (vblank_start / 2) : vblank_start; in dml_rq_dlg_get_dlg_params()
1152 vblank_start, in dml_rq_dlg_get_dlg_params()
H A Ddcn30_fpu.c187 uint32_t vblank_start; in optc3_fpu_set_vrr_m_const() local
204 &vblank_start); in optc3_fpu_set_vrr_m_const()
205 ASSERT(vtotal_min >= vblank_start + 1); in optc3_fpu_set_vrr_m_const()
/linux/include/video/
H A Dgbe.h297 short vblank_start; /* Vertical blank start */ member
/linux/drivers/gpu/drm/amd/display/dc/hubp/dcn401/
H A Ddcn401_hubp.c156 unsigned int vblank_start = 0; in hubp401_vready_at_or_After_vsync() local
170 vblank_start = timing->v_total - timing->v_front_porch; in hubp401_vready_at_or_After_vsync()
171 …vblank_end = vblank_start - timing->v_addressable - timing->v_border_top - timing->v_border_bottom; in hubp401_vready_at_or_After_vsync()
/linux/drivers/gpu/drm/amd/display/dc/dml/calcs/
H A Ddcn_calcs.c439 input->dest.vblank_start = input->dest.vtotal - pipe->stream->timing.v_front_porch; in pipe_ctx_to_e2e_pipe_params()
440 input->dest.vblank_end = input->dest.vblank_start in pipe_ctx_to_e2e_pipe_params()
1231 pipe->pipe_dlg_param.vblank_start = asic_blank_start; in dcn_validate_bandwidth()
1257 hsplit_pipe->pipe_dlg_param.vblank_start = pipe->pipe_dlg_param.vblank_start; in dcn_validate_bandwidth()
/linux/drivers/gpu/drm/
H A Ddrm_vblank.c1001 u64 vblank_start; in drm_crtc_next_vblank_start() local
1015 vblank_start = DIV_ROUND_DOWN_ULL( in drm_crtc_next_vblank_start()
1018 *vblanktime = ktime_add(*vblanktime, ns_to_ktime(vblank_start)); in drm_crtc_next_vblank_start()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/dml2_pmo/
H A Ddml2_pmo_dcn4_fams2.c1667 stream_fams2_meta->vblank_start = timing->v_blank_end + timing->v_active; in build_fams2_meta_per_stream()
1721 stream_fams2_meta->vblank_start - in build_fams2_meta_per_stream()
1731 stream_fams2_meta->method_vblank.common.allow_start_otg_vline = stream_fams2_meta->vblank_start; in build_fams2_meta_per_stream()
1765 stream_fams2_meta->vblank_start - in build_fams2_meta_per_stream()
1774 stream_fams2_meta->vblank_start + in build_fams2_meta_per_stream()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/
H A Ddml21_translation_helper.c354 unsigned int hblank_start, vblank_start, min_hardware_refresh_in_uhz; in populate_dml21_timing_config_from_stream_state() local
376 vblank_start = stream->timing.v_total - stream->timing.v_front_porch; in populate_dml21_timing_config_from_stream_state()
378 timing->v_blank_end = vblank_start - stream->timing.v_addressable in populate_dml21_timing_config_from_stream_state()
/linux/drivers/gpu/drm/amd/display/dc/dml2/dml21/src/inc/
H A Ddml2_internal_shared_types.h271 unsigned int vblank_start; member
/linux/drivers/gpu/drm/amd/display/dmub/inc/
H A Ddmub_cmd.h1792 uint16_t vblank_start; member
1982 uint16_t vblank_start; member
2014 uint16_t vblank_start; member

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