| /freebsd/sys/contrib/openzfs/module/icp/asm-arm/sha2/ |
| H A D | sha512-armv7.S | 518 vadd.i64 d16,d30 @ h+=Maj from the past
533 vadd.i64 d27,d29,d23
536 vadd.i64 d27,d26
538 vadd.i64 d28,d0
543 vadd.i64 d27,d28
546 vadd.i64 d19,d27
547 vadd.i64 d30,d27
548 @ vadd.i64 d23,d30
555 vadd.i64 d23,d30 @ h+=Maj from the past
570 vadd.i64 d27,d29,d22
[all …]
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| H A D | sha256-armv7.S | 1877 vadd.i32 q8,q8,q0
1878 vadd.i32 q9,q9,q1
1880 vadd.i32 q10,q10,q2
1882 vadd.i32 q11,q11,q3
1906 vadd.i32 q0,q0,q9
1936 vadd.i32 q0,q0,q9
1951 vadd.i32 d0,d0,d25
1978 vadd.i32 d1,d1,d25
1981 vadd.i32 q8,q8,q0
2004 vadd.i32 q1,q1,q9
[all …]
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| /freebsd/sys/crypto/openssl/arm/ |
| H A D | poly1305-armv4.S | 781 vadd.i32 d24,d24,d14 @ accumulate inp[0:1]
783 vadd.i32 d20,d20,d10
785 vadd.i32 d26,d26,d16
788 vadd.i32 d22,d22,d12
791 vadd.i32 d28,d28,d18
875 vadd.i64 q9,q9,q15 @ h3 -> h4
878 vadd.i64 q6,q6,q4 @ h0 -> h1
886 vadd.i64 q7,q7,q4 @ h1 -> h2
892 vadd.i32 d10,d10,d30
899 vadd.i32 d16,d16,d8 @ h2 -> h3
[all …]
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| H A D | chacha-armv4.S | 852 vadd.i32 q7,q3,q12 @ counter+1
858 vadd.i32 q11,q7,q12 @ counter+2
867 vadd.i32 q0,q0,q1
869 vadd.i32 q4,q4,q5
871 vadd.i32 q8,q8,q9
885 vadd.i32 q2,q2,q3
887 vadd.i32 q6,q6,q7
889 vadd.i32 q10,q10,q11
909 vadd.i32 q0,q0,q1
911 vadd.i32 q4,q4,q5
[all …]
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| H A D | sha1-armv4-large.S | 528 vadd.i32 q8,q0,q14
530 vadd.i32 q9,q1,q14
532 vadd.i32 q10,q2,q14
542 vadd.i32 q13,q3,q14
565 vadd.i32 q8,q12,q12
589 vadd.i32 q13,q8,q14
612 vadd.i32 q9,q12,q12
636 vadd.i32 q13,q9,q14
658 vadd.i32 q10,q12,q12
682 vadd.i32 q13,q10,q14
[all …]
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| H A D | sha256-armv4.S | 1920 vadd.i32 q8,q8,q0
1921 vadd.i32 q9,q9,q1
1923 vadd.i32 q10,q10,q2
1925 vadd.i32 q11,q11,q3
1949 vadd.i32 q0,q0,q9
1979 vadd.i32 q0,q0,q9
1994 vadd.i32 d0,d0,d25
2021 vadd.i32 d1,d1,d25
2024 vadd.i32 q8,q8,q0
2047 vadd.i32 q1,q1,q9
[all …]
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| H A D | keccak1600-armv4.S | 2251 vadd.u64 q4, q13, q13 @ C[0..1]<<1
2252 vadd.u64 q15, q14, q14 @ C[2..3]<<1
2253 vadd.u64 d18, d25, d25 @ C[4]<<1
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| /freebsd/contrib/llvm-project/compiler-rt/lib/builtins/arm/ |
| H A D | addsf3vfp.S | 21 vadd.f32 s0, s0, s1
25 vadd.f32 s14, s14, s15
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| H A D | adddf3vfp.S | 20 vadd.f64 d0, d0, d1
24 vadd.f64 d6, d6, d7
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| /freebsd/lib/libc/arm/aeabi/ |
| H A D | aeabi_vfp_float.S | 160 vadd.f32 s0, s0, s1
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| H A D | aeabi_vfp_double.S | 170 vadd.f64 d0, d0, d1
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| /freebsd/contrib/llvm-project/clang/include/clang/Basic/ |
| H A D | arm_fp16.td | 123 def VADDSH : SInst<"vadd", "111", "Sh">;
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| H A D | arm_neon.td | 301 def VADD : IOpInst<"vadd", "...",
761 def VADDP : WInst<"vadd", "...", "PcPsPlQPcQPsQPl">;
817 def ADD : IOpInst<"vadd", "...", "dQd", OP_ADD>;
1190 // poly128_t vadd for AArch64 only see VADDP for the rest
1191 def VADDP_Q : WInst<"vadd", "...", "QPk">;
1312 def SCALAR_ADD : SInst<"vadd", "111", "SlSUl">;
1708 def VADDH : SOpInst<"vadd", "...", "hQh", OP_ADD>;
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| H A D | riscv_vector_common.td | 17 // "def vadd : RVVBuiltin" will be used to define things like "vadd_vv_i32m1",
157 // '_'. For example, the default overloaded name is `vadd` for Name `vadd_vv`.
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| H A D | riscv_vector.td | 759 defm vadd : RVVIntBinBuiltinSet;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/ARM/ |
| H A D | ARMInstrVFP.td | 441 IIC_fpALU64, "vadd", ".f64\t$Dd, $Dn, $Dm",
448 IIC_fpALU32, "vadd", ".f32\t$Sd, $Sn, $Sm",
459 IIC_fpALU16, "vadd", ".f16\t$Sd, $Sn, $Sm",
2743 def : VFP2MnemonicAlias<"fadds", "vadd.f32">;
2744 def : VFP2MnemonicAlias<"faddd", "vadd.f64">;
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| H A D | ARMInstrMVE.td | 406 // If the instruction has a suffix, like vadd.f32, then the
408 // name has to be "vadd${vp}.f32".
2057 : MVE_VADDSUB_m<"vadd", VTI, 0b0, add, int_arm_mve_add_predicated>;
3715 : MVE_VADDSUB_fp_m<"vadd", 0, VTI, fadd, int_arm_mve_add_predicated, IdentityVec>;
5202 : MVE_VADDSUB_qr_m<"vadd", VTI, 0b0, add, int_arm_mve_add_predicated>;
5351 defm MVE_VADD_qr_f32 : MVE_VADDSUB_qr_f<"vadd", MVE_v4f32, 0b0, fadd,
5353 defm MVE_VADD_qr_f16 : MVE_VADDSUB_qr_f<"vadd", MVE_v8f16, 0b0, fadd,
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| H A D | ARMInstrNEON.td | 4266 defm VADD : N3V_QHSD<0, 0, 0b1000, 0, IIC_VBINiD, IIC_VBINiQ, "vadd", "i",
4268 def VADDfd : N3VD<0, 0, 0b00, 0b1101, 0, IIC_VBIND, "vadd", "f32",
4270 def VADDfq : N3VQ<0, 0, 0b00, 0b1101, 0, IIC_VBINQ, "vadd", "f32",
4272 def VADDhd : N3VD<0, 0, 0b01, 0b1101, 0, IIC_VBIND, "vadd", "f16",
4275 def VADDhq : N3VQ<0, 0, 0b01, 0b1101, 0, IIC_VBINQ, "vadd", "f16",
9133 def : NEONMnemonicAlias<"vaddq", "vadd">;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/Hexagon/ |
| H A D | HexagonDepInstrInfo.td | 30256 "$Vd32.qf16 = vadd($Vu32.hf,$Vv32.hf)",
30269 "$Vdd32.hf = vadd($Vu32.f8,$Vv32.f8)",
30282 "$Vd32.hf = vadd($Vu32.hf,$Vv32.hf)",
30295 "$Vd32.qf16 = vadd($Vu32.qf16,$Vv32.qf16)",
30308 "$Vd32.qf16 = vadd($Vu32.qf16,$Vv32.hf)",
30321 "$Vd32.qf32 = vadd($Vu32.qf32,$Vv32.qf32)",
30334 "$Vd32.qf32 = vadd($Vu32.qf32,$Vv32.sf)",
30347 "$Vd32.qf32 = vadd($Vu32.sf,$Vv32.sf)",
30360 "$Vdd32.sf = vadd($Vu32.bf,$Vv32.bf)",
30373 "$Vdd32.sf = vadd($Vu32.hf,$Vv32.hf)",
[all …]
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| H A D | HexagonPatternsHVX.td | 954 // v27.b = vadd(Inp.b,v29.b) ; x + masks
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| /freebsd/sys/contrib/zstd/lib/compress/ |
| H A D | zstd_compress.c | 7202 __m256i vadd = _mm256_add_epi32(vin, addition); in convertSequences_noRepcodes() local
7205 __m256i ll_cmp = _mm256_cmpgt_epi32(vadd, limit); /* 0xFFFFFFFF for element > 65535 */ in convertSequences_noRepcodes()
7209 __m256i vshf = _mm256_shuffle_epi8(vadd, mask); in convertSequences_noRepcodes()
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| /freebsd/sys/contrib/openzfs/module/zstd/lib/compress/ |
| H A D | zstd_compress.c | 7203 __m256i vadd = _mm256_add_epi32(vin, addition); in convertSequences_noRepcodes() local
7206 __m256i ll_cmp = _mm256_cmpgt_epi32(vadd, limit); /* 0xFFFFFFFF for element > 65535 */ in convertSequences_noRepcodes()
7210 __m256i vshf = _mm256_shuffle_epi8(vadd, mask); in convertSequences_noRepcodes()
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| /freebsd/contrib/llvm-project/llvm/include/llvm/IR/ |
| H A D | IntrinsicsRISCV.td | 1384 defm vadd : RISCVBinaryAAX;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/X86/ |
| H A D | X86InstrAVX10.td | 1027 defm VADDBF16 : avx10_fp_binop_bf16<0x58, "vadd", fadd, SchedWriteFAddSizes, 1>;
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| /freebsd/contrib/llvm-project/llvm/lib/Target/RISCV/ |
| H A D | RISCVInstrInfoVSDPatterns.td | 900 // Match VSUB with a small immediate to vadd.vi by negating the immediate.
|