| /linux/drivers/gpu/drm/amd/display/modules/inc/ |
| H A D | mod_stats.h | 67 unsigned int v_total_max,
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| H A D | mod_freesync.h | 125 unsigned int *v_total_min, unsigned int *v_total_max,
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn35/ |
| H A D | dcn35_hwseq.h | 98 int num_pipes, uint32_t v_total_min, uint32_t v_total_max);
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| H A D | dcn35_hwseq.c | 1432 params.vertical_total_max = adjust.v_total_max; in dcn35_set_drr()
1458 if (adjust.v_total_max != 0 && adjust.v_total_min != 0) in dcn35_set_drr()
1484 int num_pipes, uint32_t v_total_min, uint32_t v_total_max) in dcn35_set_long_vblank() argument
1489 params.vertical_total_max = v_total_max; in dcn35_set_long_vblank()
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| /linux/drivers/gpu/drm/amd/display/dc/inc/hw/ |
| H A D | optc.h | 78 uint32_t v_total_max; member
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| /linux/drivers/gpu/drm/amd/display/dc/dce110/ |
| H A D | dce110_timing_generator.c | 371 uint32_t v_total_max = 0; in dce110_timing_generator_set_drr() local
381 v_total_max = dm_read_reg(tg->ctx, addr); in dce110_timing_generator_set_drr()
390 set_reg_field_value(v_total_max, in dce110_timing_generator_set_drr()
445 set_reg_field_value(v_total_max, in dce110_timing_generator_set_drr()
463 dm_write_reg(tg->ctx, addr, v_total_max); in dce110_timing_generator_set_drr()
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| /linux/drivers/gpu/drm/amd/display/dc/clk_mgr/dce110/ |
| H A D | dce110_clk_mgr.c | 103 if (adjust.v_total_max != adjust.v_total_min) in dce110_get_min_vblank_time_us()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/ |
| H A D | display_mode_lib.c | 217 dml_print("DML PARAMS: v_total_max = %d\n", pipe_src->v_total_max); in dml_log_pipe_params()
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| H A D | display_mode_structs.h | 444 unsigned char v_total_max; member
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| /linux/drivers/gpu/drm/amd/display/dc/ |
| H A D | dc_hw_types.h | 999 uint32_t v_total_max; member
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| H A D | dc_dmub_srv.c | 368 cmd.drr_update.dmub_optc_state_req.v_total_max = vtotal_max; in dc_dmub_srv_drr_update_cmd()
1758 cmd.fams2_drr_update.dmub_optc_state_req.v_total_max = vtotal_max; in dc_dmub_srv_fams2_drr_update()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/ |
| H A D | hw_sequencer.h | 460 …ong_vtotal)(struct pipe_ctx **pipe_ctx, int num_pipes, uint32_t v_total_min, uint32_t v_total_max);
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn30/ |
| H A D | dcn30_hwseq.c | 964 unsigned int v_total = stream->adjust.v_total_max ? in dcn30_apply_idle_power_optimizations()
965 stream->adjust.v_total_max : stream->timing.v_total; in dcn30_apply_idle_power_optimizations()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn35/ |
| H A D | dcn35_fpu.c | 463 if (pipe->stream->adjust.v_total_max == in dcn35_populate_dml_pipes_from_context_fpu()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dce110/ |
| H A D | dce110_hwseq.c | 1656 params.vertical_total_max = stream->adjust.v_total_max; in dce110_apply_single_controller_ctx_to_hw()
1662 if (stream->adjust.v_total_min != 0 && stream->adjust.v_total_max != 0) in dce110_apply_single_controller_ctx_to_hw()
2092 params.vertical_total_max = adjust.v_total_max; in set_drr()
2109 if (adjust.v_total_max != 0 && adjust.v_total_min != 0) in set_drr()
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| /linux/drivers/gpu/drm/amd/display/dmub/inc/ |
| H A D | dmub_cmd.h | 1797 uint32_t v_total_max; member
5011 uint32_t v_total_max; member
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| /linux/drivers/gpu/drm/amd/display/dc/dml2/ |
| H A D | dml2_utils.c | 271 pipe_ctx->pipe_dlg_param.vtotal_max = pipe_ctx->stream->adjust.v_total_max; in populate_pipe_ctx_dlg_params_from_dml()
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| /linux/drivers/gpu/drm/amd/display/dc/optc/dcn10/ |
| H A D | dcn10_optc.c | 1349 OTG_V_TOTAL_MAX, &s->v_total_max); in optc1_read_otg_state()
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| /linux/drivers/gpu/drm/amd/display/dc/hwss/dcn10/ |
| H A D | dcn10_hwseq.c | 443 s.v_total_max, in dcn10_log_hw_state()
3206 params.vertical_total_max = adjust.v_total_max; in dcn10_set_drr()
3224 if (adjust.v_total_max != 0 && adjust.v_total_min != 0) in dcn10_set_drr()
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| /linux/drivers/gpu/drm/amd/display/dc/dml/dcn20/ |
| H A D | dcn20_fpu.c | 1414 pipes[pipe_cnt].pipe.dest.vtotal_max = res_ctx->pipe_ctx[i].stream->adjust.v_total_max; in dcn20_populate_dml_pipes_from_context()
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